Commit c1b74035 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
Browse files

staging: comedi: ni_stc.h: tidy up AI_Personal_Register and bits



Rename the CamelCase. Use the BIT() macro to define the bits.

Tidy up ni_ai_reset() by using a local var to set the common bits and
programming the register in the common code path.

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 04b68467
Loading
Loading
Loading
Loading
+8 −17
Original line number Diff line number Diff line
@@ -370,7 +370,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
	[NISTC_INTA2_ENA_REG]		= { 0, 0 }, /* E-Series only */
	[NISTC_INTB_ENA_REG]		= { 0x196, 2 },
	[NISTC_INTB2_ENA_REG]		= { 0, 0 }, /* E-Series only */
	[AI_Personal_Register]		= { 0x19a, 2 },
	[NISTC_AI_PERSONAL_REG]		= { 0x19a, 2 },
	[AO_Personal_Register]		= { 0x19c, 2 },
	[RTSI_Trig_A_Output_Register]	= { 0x19e, 2 },
	[RTSI_Trig_B_Output_Register]	= { 0x1a0, 2 },
@@ -1608,6 +1608,7 @@ static int ni_ao_setup_MITE_dma(struct comedi_device *dev)
static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
{
	struct ni_private *devpriv = dev->private;
	unsigned ai_personal;
	unsigned ai_out_ctrl;

	ni_release_ai_mite_channel(dev);
@@ -1631,35 +1632,25 @@ static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
	/* generate FIFO interrupts on non-empty */
	ni_stc_writew(dev, (0 << 6) | 0x0000, AI_Mode_3_Register);

	ai_personal = NISTC_AI_PERSONAL_SHIFTIN_PW |
		      NISTC_AI_PERSONAL_SOC_POLARITY |
		      NISTC_AI_PERSONAL_LOCALMUX_CLK_PW;
	ai_out_ctrl = NISTC_AI_OUT_CTRL_SCAN_IN_PROG_SEL(3) |
		      NISTC_AI_OUT_CTRL_EXTMUX_CLK_SEL(0) |
		      NISTC_AI_OUT_CTRL_LOCALMUX_CLK_SEL(2) |
		      NISTC_AI_OUT_CTRL_SC_TC_SEL(3);
	if (devpriv->is_611x) {
		ni_stc_writew(dev,
			      AI_SHIFTIN_Pulse_Width |
			      AI_SOC_Polarity |
			      AI_LOCALMUX_CLK_Pulse_Width,
			      AI_Personal_Register);
		ai_out_ctrl |= NISTC_AI_OUT_CTRL_CONVERT_HIGH;
	} else if (devpriv->is_6143) {
		ni_stc_writew(dev, AI_SHIFTIN_Pulse_Width |
				   AI_SOC_Polarity |
				   AI_LOCALMUX_CLK_Pulse_Width,
			      AI_Personal_Register);
		ai_out_ctrl |= NISTC_AI_OUT_CTRL_CONVERT_LOW;
	} else {
		ni_stc_writew(dev,
			      AI_SHIFTIN_Pulse_Width |
			      AI_SOC_Polarity |
			      AI_CONVERT_Pulse_Width |
			      AI_LOCALMUX_CLK_Pulse_Width,
			      AI_Personal_Register);
		ai_personal |= NISTC_AI_PERSONAL_CONVERT_PW;
		if (devpriv->is_622x)
			ai_out_ctrl |= NISTC_AI_OUT_CTRL_CONVERT_HIGH;
		else
			ai_out_ctrl |= NISTC_AI_OUT_CTRL_CONVERT_LOW;
	}
	ni_stc_writew(dev, ai_personal, NISTC_AI_PERSONAL_REG);
	ni_stc_writew(dev, ai_out_ctrl, NISTC_AI_OUT_CTRL_REG);

	/* the following registers should not be changed, because there
@@ -1667,7 +1658,7 @@ static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
	 * any of these, add a backup register and other appropriate code:
	 *      NISTC_AI_MODE1_REG
	 *      AI_Mode_3_Register
	 *      AI_Personal_Register
	 *      NISTC_AI_PERSONAL_REG
	 *      NISTC_AI_OUT_CTRL_REG
	 */

+14 −14
Original line number Diff line number Diff line
@@ -419,6 +419,20 @@
#define NISTC_INTB_ENA_AO_START1	BIT(1)
#define NISTC_INTB_ENA_AO_BC_TC		BIT(0)

#define NISTC_AI_PERSONAL_REG		77
#define NISTC_AI_PERSONAL_SHIFTIN_PW		BIT(15)
#define NISTC_AI_PERSONAL_EOC_POLARITY		BIT(14)
#define NISTC_AI_PERSONAL_SOC_POLARITY		BIT(13)
#define NISTC_AI_PERSONAL_SHIFTIN_POL		BIT(12)
#define NISTC_AI_PERSONAL_CONVERT_TIMEBASE	BIT(11)
#define NISTC_AI_PERSONAL_CONVERT_PW		BIT(10)
#define NISTC_AI_PERSONAL_CONVERT_ORIG_PULSE	BIT(9)
#define NISTC_AI_PERSONAL_FIFO_FLAGS_POL	BIT(8)
#define NISTC_AI_PERSONAL_OVERRUN_MODE		BIT(7)
#define NISTC_AI_PERSONAL_EXTMUX_CLK_PW		BIT(6)
#define NISTC_AI_PERSONAL_LOCALMUX_CLK_PW	BIT(5)
#define NISTC_AI_PERSONAL_AIFREQ_POL		BIT(4)

#define AI_Status_1_Register		2
#define Interrupt_A_St				0x8000
#define AI_FIFO_Full_St				0x4000
@@ -477,20 +491,6 @@ enum Joint_Status_2_Bits {
#define AO_BC_Save_Registers		18
#define AO_UC_Save_Registers		20

#define AI_Personal_Register		77
#define AI_SHIFTIN_Pulse_Width			_bit15
#define AI_EOC_Polarity				_bit14
#define AI_SOC_Polarity				_bit13
#define AI_SHIFTIN_Polarity			_bit12
#define AI_CONVERT_Pulse_Timebase		_bit11
#define AI_CONVERT_Pulse_Width			_bit10
#define AI_CONVERT_Original_Pulse		_bit9
#define AI_FIFO_Flags_Polarity			_bit8
#define AI_Overrun_Mode				_bit7
#define AI_EXTMUX_CLK_Pulse_Width		_bit6
#define AI_LOCALMUX_CLK_Pulse_Width		_bit5
#define AI_AIFREQ_Polarity			_bit4

#define AO_Personal_Register		78
enum AO_Personal_Bits {
	AO_Interval_Buffer_Mode = 1 << 3,