perf/x86: Use common PMU interrupt disabled code (c184c980) · Commits · 戴 / test

Make the x86 perf code use the new common PMU interrupt disabled code. Typically most x86 machines have working PMU interrupts, although some older p6-class machines had this problem. Signed-off-by:

Vince Weaver <vincent.weaver@maine.edu> Signed-off-by:

Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161715560.11099@vincent-weaver-1.umelst.maine.edu Signed-off-by:

Ingo Molnar <mingo@kernel.org>

arch/x86/kernel/cpu/perf_event.c

+9 −9

Original line number	Diff line number	Diff line
		@@ -303,15 +303,6 @@ int x86_setup_perfctr(struct perf_event *event)
		hwc->sample_period = x86_pmu.max_period;
		hwc->last_period = hwc->sample_period;
		local64_set(&hwc->period_left, hwc->sample_period);
		} else {
		/*
		* If we have a PMU initialized but no APIC
		* interrupts, we cannot sample hardware
		* events (user-space has to fall back and
		* sample via a hrtimer based software event):
		*/
		if (!x86_pmu.apic)
		return -EOPNOTSUPP;
		}

		if (attr->type == PERF_TYPE_RAW)
		@@ -1367,6 +1358,15 @@ static void __init pmu_check_apic(void)
		x86_pmu.apic = 0;
		pr_info("no APIC, boot with the \"lapic\" boot parameter to force-enable it.\n");
		pr_info("no hardware sampling interrupt available.\n");

		/*
		* If we have a PMU initialized but no APIC
		* interrupts, we cannot sample hardware
		* events (user-space has to fall back and
		* sample via a hrtimer based software event):
		*/
		pmu.capabilities \|= PERF_PMU_CAP_NO_INTERRUPT;

		}

		static struct attribute_group x86_pmu_format_group = {

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