perf/ARM: Use common PMU interrupt disabled code (edcb4d3c) · Commits · 戴 / test

Make the ARM perf code use the new common PMU interrupt disabled code. This allows perf to work on ARM machines without a working PMU interrupt (for example, raspberry pi). Acked-by:

Will Deacon <will.deacon@arm.com> Signed-off-by:

Vince Weaver <vincent.weaver@maine.edu> [peterz: applied changes suggested by Will] Signed-off-by:

Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161712190.11099@vincent-weaver-1.umelst.maine.edu [ Small readability tweaks to the code. ] Signed-off-by:

Ingo Molnar <mingo@kernel.org> Signed-off-by:

Ingo Molnar <mingo@kernel.org>

arch/arm/kernel/perf_event.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -410,7 +410,7 @@ __hw_perf_event_init(struct perf_event *event)
		*/
		hwc->config_base \|= (unsigned long)mapping;

		if (!hwc->sample_period) {
		if (!is_sampling_event(event)) {
		/*
		* For non-sampling runs, limit the sample_period to half
		* of the counter width. That way, the new counter value

arch/arm/kernel/perf_event_cpu.c

+6 −2

Original line number	Diff line number	Diff line
		@@ -126,8 +126,8 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)

		irqs = min(pmu_device->num_resources, num_possible_cpus());
		if (irqs < 1) {
		pr_err("no irqs for PMUs defined\n");
		return -ENODEV;
		printk_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
		return 0;
		}

		irq = platform_get_irq(pmu_device, 0);
		@@ -191,6 +191,10 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
		/* Ensure the PMU has sane values out of reset. */
		if (cpu_pmu->reset)
		on_each_cpu(cpu_pmu->reset, cpu_pmu, 1);

		/* If no interrupts available, set the corresponding capability flag */
		if (!platform_get_irq(cpu_pmu->plat_device, 0))
		cpu_pmu->pmu.capabilities \|= PERF_PMU_CAP_NO_INTERRUPT;
		}

		/*

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