clocksource: convert ARM 32-bit down counting clocksources (bfe45e0b) · Commits · 戴 / test

arch/arm/Kconfig

+2 −0

+6 −24

Original line number	Diff line number	Diff line
		@@ -32,35 +32,17 @@
		#define TIMER_FREQ_KHZ (1000)
		#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)

		static void __iomem *clksrc_base;

		static cycle_t sp804_read(struct clocksource *cs)
		{
		return ~readl(clksrc_base + TIMER_VALUE);
		}

		static struct clocksource clocksource_sp804 = {
		.name = "timer3",
		.rating = 200,
		.read = sp804_read,
		.mask = CLOCKSOURCE_MASK(32),
		.flags = CLOCK_SOURCE_IS_CONTINUOUS,
		};

		void __init sp804_clocksource_init(void __iomem *base)
		{
		struct clocksource *cs = &clocksource_sp804;

		clksrc_base = base;

		/* setup timer 0 as free-running clocksource */
		writel(0, clksrc_base + TIMER_CTRL);
		writel(0xffffffff, clksrc_base + TIMER_LOAD);
		writel(0xffffffff, clksrc_base + TIMER_VALUE);
		writel(0, base + TIMER_CTRL);
		writel(0xffffffff, base + TIMER_LOAD);
		writel(0xffffffff, base + TIMER_VALUE);
		writel(TIMER_CTRL_32BIT \| TIMER_CTRL_ENABLE \| TIMER_CTRL_PERIODIC,
		clksrc_base + TIMER_CTRL);
		base + TIMER_CTRL);

		clocksource_register_khz(cs, TIMER_FREQ_KHZ);
		clocksource_mmio_init(base + TIMER_VALUE, "timer3",
		TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down);
		}

+2 −16

Original line number	Diff line number	Diff line
		@@ -83,26 +83,12 @@ static void epit_irq_acknowledge(void)
		__raw_writel(EPITSR_OCIF, timer_base + EPITSR);
		}

		static cycle_t epit_read(struct clocksource *cs)
		{
		return 0 - __raw_readl(timer_base + EPITCNR);
		}

		static struct clocksource clocksource_epit = {
		.name = "epit",
		.rating = 200,
		.read = epit_read,
		.mask = CLOCKSOURCE_MASK(32),
		.flags = CLOCK_SOURCE_IS_CONTINUOUS,
		};

		static int __init epit_clocksource_init(struct clk *timer_clk)
		{
		unsigned int c = clk_get_rate(timer_clk);

		clocksource_register_hz(&clocksource_epit, c);

		return 0;
		return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,
		clocksource_mmio_readl_down);
		}

		/* clock event */

+1 −0

Original line number	Diff line number	Diff line
		@@ -5,6 +5,7 @@
		config PLAT_NOMADIK
		bool
		depends on ARCH_NOMADIK \|\| ARCH_U8500
		select CLKSRC_MMIO
		default y
		help
		Common platform code for Nomadik and other ST-Ericsson

+3 −28

Original line number	Diff line number	Diff line
		@@ -25,29 +25,6 @@

		void __iomem mtu_base; / Assigned by machine code */

		/*
		* Kernel assumes that sched_clock can be called early
		* but the MTU may not yet be initialized.
		*/
		static cycle_t nmdk_read_timer_dummy(struct clocksource *cs)
		{
		return 0;
		}

		/* clocksource: MTU decrements, so we negate the value being read. */
		static cycle_t nmdk_read_timer(struct clocksource *cs)
		{
		return -readl(mtu_base + MTU_VAL(0));
		}

		static struct clocksource nmdk_clksrc = {
		.name = "mtu_0",
		.rating = 200,
		.read = nmdk_read_timer_dummy,
		.mask = CLOCKSOURCE_MASK(32),
		.flags = CLOCK_SOURCE_IS_CONTINUOUS,
		};

		/*
		* Override the global weak sched_clock symbol with this
		* local implementation which uses the clocksource to get some
		@@ -172,12 +149,10 @@ void __init nmdk_timer_init(void)
		writel(0, mtu_base + MTU_BGLR(0));
		writel(cr \| MTU_CRn_ENA, mtu_base + MTU_CR(0));

		/* Now the clock source is ready */
		nmdk_clksrc.read = nmdk_read_timer;

		if (clocksource_register_hz(&nmdk_clksrc, rate))
		if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
		rate, 200, 32, clocksource_mmio_readl_down))
		pr_err("timer: failed to initialize clock source %s\n",
		nmdk_clksrc.name);
		"mtu_0");

		init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);