Commit ba88d153 authored by Manasi Navare's avatar Manasi Navare Committed by Rodrigo Vivi
Browse files

drm/i915: Split intel_ddi_pre_enable() into DP and HDMI versions 



Split intel_ddi_pre_enable() into encoder type specific versions that
don't depend on crtc_state. The necessary parameters are passed as
function arguments. This split will be necessary for implementing DP
upfront link training.

v3:
* Rebased onto latest kernel (Manasi)
v2:
* Rebased onto kernel v4.7 (Jim)

Reviewed-by: default avatarDurgadoss R <durgadoss.r@intel.com>
Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: default avatarJim Bride <jim.bride@linux.intel.com>
Signed-off-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent c856052a

drivers/gpu/drm/i915/intel_ddi.c

+60 −45
Original line number Original line Diff line number Diff line
@@ -1634,60 +1634,75 @@ void intel_ddi_clk_select(struct intel_encoder *encoder, 
	}

	}

}

}





static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder,

static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,

				 struct intel_crtc_state *pipe_config,

				    int link_rate, uint32_t lane_count,

				 struct drm_connector_state *conn_state)

				    struct intel_shared_dpll *pll,

				    bool link_mst)

{

{

	struct drm_encoder *encoder = &intel_encoder->base;

	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);

	struct drm_i915_private *dev_priv = to_i915(encoder->dev);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);

	enum port port = intel_ddi_get_encoder_port(encoder);

	enum port port = intel_ddi_get_encoder_port(intel_encoder);

	int type = intel_encoder->type;



	if (type == INTEL_OUTPUT_HDMI) {

		struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);



		intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);

	}





	if (type == INTEL_OUTPUT_EDP) {

	intel_dp_set_link_params(intel_dp, link_rate, lane_count,

		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);

				 link_mst);

	if (encoder->type == INTEL_OUTPUT_EDP)

		intel_edp_panel_on(intel_dp);

		intel_edp_panel_on(intel_dp);

	}



	intel_ddi_clk_select(intel_encoder, crtc->config->shared_dpll);



	if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {

		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);



		intel_prepare_dp_ddi_buffers(intel_encoder);



		intel_dp_set_link_params(intel_dp, crtc->config->port_clock,

					 crtc->config->lane_count,

					 intel_crtc_has_type(crtc->config,

							     INTEL_OUTPUT_DP_MST));



		intel_ddi_init_dp_buf_reg(intel_encoder);





	intel_ddi_clk_select(encoder, pll);

	intel_prepare_dp_ddi_buffers(encoder);

	intel_ddi_init_dp_buf_reg(encoder);

	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);

	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);

	intel_dp_start_link_train(intel_dp);

	intel_dp_start_link_train(intel_dp);

		if (port != PORT_A || INTEL_INFO(dev_priv)->gen >= 9)

	if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)

		intel_dp_stop_link_train(intel_dp);

		intel_dp_stop_link_train(intel_dp);

	} else if (type == INTEL_OUTPUT_HDMI) {

}

		struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);

		int level = intel_ddi_hdmi_level(dev_priv, port);





		intel_prepare_hdmi_ddi_buffers(intel_encoder);

static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,

				      bool has_hdmi_sink,

				      struct drm_display_mode *adjusted_mode,

				      struct intel_shared_dpll *pll)

{

	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct drm_encoder *drm_encoder = &encoder->base;

	enum port port = intel_ddi_get_encoder_port(encoder);

	int level = intel_ddi_hdmi_level(dev_priv, port);





	intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);

	intel_ddi_clk_select(encoder, pll);

	intel_prepare_hdmi_ddi_buffers(encoder);

	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))

	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))

			skl_ddi_set_iboost(intel_encoder, level);

		skl_ddi_set_iboost(encoder, level);

	else if (IS_BROXTON(dev_priv))

	else if (IS_BROXTON(dev_priv))

		bxt_ddi_vswing_sequence(dev_priv, level, port,

		bxt_ddi_vswing_sequence(dev_priv, level, port,

					INTEL_OUTPUT_HDMI);

					INTEL_OUTPUT_HDMI);





		intel_hdmi->set_infoframes(encoder,

	intel_hdmi->set_infoframes(drm_encoder,

				   has_hdmi_sink,

				   adjusted_mode);

}



static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder,

				 struct intel_crtc_state *pipe_config,

				 struct drm_connector_state *conn_state)

{

	struct drm_encoder *encoder = &intel_encoder->base;

	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);

	int type = intel_encoder->type;



	if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {

		intel_ddi_pre_enable_dp(intel_encoder,

					crtc->config->port_clock,

					crtc->config->lane_count,

					crtc->config->shared_dpll,

					intel_crtc_has_type(crtc->config,

							    INTEL_OUTPUT_DP_MST));

	}

	if (type == INTEL_OUTPUT_HDMI) {

		intel_ddi_pre_enable_hdmi(intel_encoder,

					  crtc->config->has_hdmi_sink,

					  crtc->config->has_hdmi_sink,

					   &crtc->config->base.adjusted_mode);

					  &crtc->config->base.adjusted_mode,

					  crtc->config->shared_dpll);

	}

	}

}

}

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