mtd: bcm47xxnflash: replace some magic numbers (b7ab610f) · Commits · 戴 / test

drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -24,6 +24,8 @@
		#define NFLASH_SECTOR_SIZE 512

		#define NCTL_CMD0 0x00010000
		#define NCTL_COL 0x00020000 /* Update column with value from BCMA_CC_NFLASH_COL_ADDR */
		#define NCTL_ROW 0x00040000 /* Update row (page) with value from BCMA_CC_NFLASH_ROW_ADDR */
		#define NCTL_CMD1W 0x00080000
		#define NCTL_READ 0x00100000
		#define NCTL_WRITE 0x00200000
		@@ -110,7 +112,7 @@ static void bcm47xxnflash_ops_bcm4706_read(struct mtd_info mtd, uint8_t buf,
		b47n->curr_page_addr);

		/* Prepare to read */
		ctlcode = NCTL_CSA \| NCTL_CMD1W \| 0x00040000 \| 0x00020000 \|
		ctlcode = NCTL_CSA \| NCTL_CMD1W \| NCTL_ROW \| NCTL_COL \|
		NCTL_CMD0;
		ctlcode \|= NAND_CMD_READSTART << 8;
		if (bcm47xxnflash_ops_bcm4706_ctl_cmd(b47n->cc, ctlcode))
		@@ -274,7 +276,7 @@ static void bcm47xxnflash_ops_bcm4706_cmdfunc(struct mtd_info *mtd,
		case NAND_CMD_ERASE1:
		bcma_cc_write32(cc, BCMA_CC_NFLASH_ROW_ADDR,
		b47n->curr_page_addr);
		ctlcode = 0x00040000 \| NCTL_CMD1W \| NCTL_CMD0 \|
		ctlcode = NCTL_ROW \| NCTL_CMD1W \| NCTL_CMD0 \|
		NAND_CMD_ERASE1 \| (NAND_CMD_ERASE2 << 8);
		if (bcm47xxnflash_ops_bcm4706_ctl_cmd(cc, ctlcode))
		pr_err("ERASE1 failed\n");
		@@ -289,13 +291,13 @@ static void bcm47xxnflash_ops_bcm4706_cmdfunc(struct mtd_info *mtd,
		b47n->curr_page_addr);

		/* Prepare to write */
		ctlcode = 0x40000000 \| 0x00040000 \| 0x00020000 \| 0x00010000;
		ctlcode = 0x40000000 \| NCTL_ROW \| NCTL_COL \| NCTL_CMD0;
		ctlcode \|= NAND_CMD_SEQIN;
		if (bcm47xxnflash_ops_bcm4706_ctl_cmd(cc, ctlcode))
		pr_err("SEQIN failed\n");
		break;
		case NAND_CMD_PAGEPROG:
		if (bcm47xxnflash_ops_bcm4706_ctl_cmd(cc, 0x00010000 \|
		if (bcm47xxnflash_ops_bcm4706_ctl_cmd(cc, NCTL_CMD0 \|
		NAND_CMD_PAGEPROG))
		pr_err("PAGEPROG failed\n");
		if (bcm47xxnflash_ops_bcm4706_poll(cc))

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