mtd: bcm47xxnflash: NAND_CMD_RESET support (dfbd7dda) · Commits · 戴 / test

drivers/mtd/nand/bcm47xxnflash/ops_bcm4706.c

+5 −1

Original line number	Diff line number	Diff line
		@@ -14,6 +14,7 @@
		#include <linux/module.h>
		#include <linux/kernel.h>
		#include <linux/slab.h>
		#include <linux/delay.h>
		#include <linux/bcma/bcma.h>

		/* Broadcom uses 1'000'000 but it seems to be too many. Tests on WNDR4500 has
		@@ -226,7 +227,10 @@ static void bcm47xxnflash_ops_bcm4706_cmdfunc(struct mtd_info *mtd,

		switch (command) {
		case NAND_CMD_RESET:
		pr_warn("Chip reset not implemented yet\n");
		nand_chip->cmd_ctrl(mtd, command, NAND_CTRL_CLE);

		ndelay(100);
		nand_wait_ready(mtd);
		break;
		case NAND_CMD_READID:
		ctlcode = NCTL_CSA \| 0x01000000 \| NCTL_CMD1W \| NCTL_CMD0;