Commit b647d2bd authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/tegra'

  - Fix checking of pm_runtime_get_sync() return value (David Engraf)

  - Fix AFI_PEX2_CTRL reg offset for Tegra30 (Marcel Ziswiler)

* remotes/lorenzo/pci/tegra:
  PCI: tegra: Fix afi_pex2_ctrl reg offset for Tegra30
  PCI: tegra: Fix return value check of pm_runtime_get_sync()
parents c11dfed9 21a92676
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -2499,7 +2499,6 @@ static const struct tegra_pcie_soc tegra20_pcie = {
	.num_ports = 2,
	.ports = tegra20_pcie_ports,
	.msi_base_shift = 0,
	.afi_pex2_ctrl = 0x128,
	.pads_pll_ctl = PADS_PLL_CTL_TEGRA20,
	.tx_ref_sel = PADS_PLL_CTL_TXCLKREF_DIV10,
	.pads_refclk_cfg0 = 0xfa5cfa5c,
@@ -2528,6 +2527,7 @@ static const struct tegra_pcie_soc tegra30_pcie = {
	.num_ports = 3,
	.ports = tegra30_pcie_ports,
	.msi_base_shift = 8,
	.afi_pex2_ctrl = 0x128,
	.pads_pll_ctl = PADS_PLL_CTL_TEGRA30,
	.tx_ref_sel = PADS_PLL_CTL_TXCLKREF_BUF_EN,
	.pads_refclk_cfg0 = 0xfa5cfa5c,
@@ -2798,7 +2798,7 @@ static int tegra_pcie_probe(struct platform_device *pdev)

	pm_runtime_enable(pcie->dev);
	err = pm_runtime_get_sync(pcie->dev);
	if (err) {
	if (err < 0) {
		dev_err(dev, "fail to enable pcie controller: %d\n", err);
		goto teardown_msi;
	}