Commit b45b6fbc authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2020-10-22' of... 

Merge tag 'drm-intel-next-fixes-2020-10-22' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

- Tweak initia DPCD backlight.enabled value (Sean)
- Initialize reserved MOCS indices (Ayaz)
- Mark initial fb obj as WT on eLLC machines to avoid rcu lockup (Ville)
- Support parsing of oversize batches (Chris)
- Delay execlists processing for TGL (Chris)
- Use the active reference on the vma during error capture (Chris)
- Widen CSB pointer (Chris)
- Wait for CSB entries on TGL (Chris)
- Fix unwind for scratch page allocation (Chris)
- Exclude low patches of stolen memory (Chris)
- Force VT'd workarounds when running as a guest OS (Chris)
- Drop runtime-pm assert from vpgu io accessors (Chris)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201022205613.GA3469192@intel.com
parents 3f31dedb 5c6c13cd

drivers/gpu/drm/i915/Kconfig.debug

+1 −0
Original line number Diff line number Diff line
@@ -153,6 +153,7 @@ config DRM_I915_SELFTEST 
	select DRM_EXPORT_FOR_TESTS if m

	select FAULT_INJECTION

	select PRIME_NUMBERS

	select CRC32

	help

	  Choose this option to allow the driver to perform selftests upon

	  loading; also requires the i915.selftest=1 module parameter. To

drivers/gpu/drm/i915/display/intel_display.c

+8 −0
Original line number Diff line number Diff line
@@ -3434,6 +3434,14 @@ initial_plane_vma(struct drm_i915_private *i915, 
	if (IS_ERR(obj))

		return NULL;









	/*









	 * Mark it WT ahead of time to avoid changing the









	 * cache_level during fbdev initialization. The









	 * unbind there would get stuck waiting for rcu.









	 */









	i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?









					    I915_CACHE_WT : I915_CACHE_NONE);

















	switch (plane_config->tiling) {









	case I915_TILING_NONE:









		break;
































drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c



+20
−11






























Original line number
Diff line number
Diff line







@@ -52,17 +52,11 @@ static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable)







	}









}



















/*









 * Read the current backlight value from DPCD register(s) based









 * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported









 */









static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)









static bool intel_dp_aux_backlight_dpcd_mode(struct intel_connector *connector)









{









	struct intel_dp *intel_dp = intel_attached_dp(connector);









	struct drm_i915_private *i915 = dp_to_i915(intel_dp);









	u8 read_val[2] = { 0x0 };









	u8 mode_reg;









	u16 level = 0;



















	if (drm_dp_dpcd_readb(&intel_dp->aux,









			      DP_EDP_BACKLIGHT_MODE_SET_REGISTER,








@@ -70,15 +64,29 @@ static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)







		drm_dbg_kms(&i915->drm,









			    "Failed to read the DPCD register 0x%x\n",









			    DP_EDP_BACKLIGHT_MODE_SET_REGISTER);









		return 0;









		return false;









	}



















	return (mode_reg & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) ==









	       DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD;









}



















/*









 * Read the current backlight value from DPCD register(s) based









 * on if 8-bit(MSB) or 16-bit(MSB and LSB) values are supported









 */









static u32 intel_dp_aux_get_backlight(struct intel_connector *connector)









{









	struct intel_dp *intel_dp = intel_attached_dp(connector);









	struct drm_i915_private *i915 = dp_to_i915(intel_dp);









	u8 read_val[2] = { 0x0 };









	u16 level = 0;



















	/*









	 * If we're not in DPCD control mode yet, the programmed brightness









	 * value is meaningless and we should assume max brightness









	 */









	if ((mode_reg & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) !=









	    DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD)









	if (!intel_dp_aux_backlight_dpcd_mode(connector))









		return connector->panel.backlight.max;



















	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB,








@@ -319,7 +327,8 @@ static int intel_dp_aux_setup_backlight(struct intel_connector *connector,

















	panel->backlight.min = 0;









	panel->backlight.level = intel_dp_aux_get_backlight(connector);









	panel->backlight.enabled = panel->backlight.level != 0;









	panel->backlight.enabled = intel_dp_aux_backlight_dpcd_mode(connector) &&









				   panel->backlight.level != 0;



















	return 0;









}
































drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c



+8
−2






























Original line number
Diff line number
Diff line







@@ -287,8 +287,8 @@ struct i915_execbuffer {







	u64 invalid_flags; /** Set of execobj.flags that are invalid */









	u32 context_flags; /** Set of execobj.flags to insert from the ctx */



















	u64 batch_len; /** Length of batch within object */









	u32 batch_start_offset; /** Location within object of batch */









	u32 batch_len; /** Length of batch within object */









	u32 batch_flags; /** Flags composed for emit_bb_start() */









	struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch buffer */


















@@ -871,6 +871,10 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)

















	if (eb->batch_len == 0)









		eb->batch_len = eb->batch->vma->size - eb->batch_start_offset;









	if (unlikely(eb->batch_len == 0)) { /* impossible! */









		drm_dbg(&i915->drm, "Invalid batch length\n");









		return -EINVAL;









	}



















	return 0;


















@@ -2424,7 +2428,7 @@ static int eb_parse(struct i915_execbuffer *eb)







	struct drm_i915_private *i915 = eb->i915;









	struct intel_gt_buffer_pool_node *pool = eb->batch_pool;









	struct i915_vma *shadow, *trampoline, *batch;









	unsigned int len;









	unsigned long len;









	int err;



















	if (!eb_use_cmdparser(eb)) {








@@ -2449,6 +2453,8 @@ static int eb_parse(struct i915_execbuffer *eb)







	} else {









		len += I915_CMD_PARSER_TRAMPOLINE_SIZE;









	}









	if (unlikely(len < eb->batch_len)) /* last paranoid check of overflow */









		return -EINVAL;



















	if (!pool) {









		pool = intel_gt_get_buffer_pool(eb->engine->gt, len);
































drivers/gpu/drm/i915/gem/i915_gem_stolen.c



+4
−2






























Original line number
Diff line number
Diff line







@@ -53,8 +53,10 @@ int i915_gem_stolen_insert_node(struct drm_i915_private *i915,







				struct drm_mm_node *node, u64 size,









				unsigned alignment)









{









	return i915_gem_stolen_insert_node_in_range(i915, node, size,









						    alignment, 0, U64_MAX);









	return i915_gem_stolen_insert_node_in_range(i915, node,









						    size, alignment,









						    I915_GEM_STOLEN_BIAS,









						    U64_MAX);









}



















void i915_gem_stolen_remove_node(struct drm_i915_private *i915,








































































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