Commit b371ae0d authored by Dou Liyang's avatar Dou Liyang Committed by Thomas Gleixner
Browse files

x86/apic: Remove init_bsp_APIC() 



init_bsp_APIC() which works for the virtual wire mode is used in ISA irq
initialization at boot time.

With the new APIC interrupt delivery mode scheme, which initializes the
APIC before the first interrupt is expected, init_bsp_APIC() is not longer
required and can be removed.

Signed-off-by: default avatarDou Liyang <douly.fnst@cn.fujitsu.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: yinghai@kernel.org
Cc: bhe@redhat.com
Link: https://lkml.kernel.org/r/1505293975-26005-13-git-send-email-douly.fnst@cn.fujitsu.com
parent 935356ce

arch/x86/include/asm/apic.h

+0 −1
Original line number Diff line number Diff line
@@ -136,7 +136,6 @@ extern void disconnect_bsp_APIC(int virt_wire_setup); 
extern void disable_local_APIC(void);

extern void lapic_shutdown(void);

extern void sync_Arb_IDs(void);

extern void init_bsp_APIC(void);

extern void apic_intr_mode_init(void);

extern void setup_local_APIC(void);

extern void init_apic_mappings(void);

arch/x86/kernel/apic/apic.c

+0 −49
Original line number Diff line number Diff line
@@ -1282,55 +1282,6 @@ static int __init apic_intr_mode_select(void) 
	return APIC_SYMMETRIC_IO;

}



/*

 * An initial setup of the virtual wire mode.

 */

void __init init_bsp_APIC(void)

{

	unsigned int value;



	/*

	 * Don't do the setup now if we have a SMP BIOS as the

	 * through-I/O-APIC virtual wire mode might be active.

	 */

	if (smp_found_config || !boot_cpu_has(X86_FEATURE_APIC))

		return;



	/*

	 * Do not trust the local APIC being empty at bootup.

	 */

	clear_local_APIC();



	/*

	 * Enable APIC.

	 */

	value = apic_read(APIC_SPIV);

	value &= ~APIC_VECTOR_MASK;

	value |= APIC_SPIV_APIC_ENABLED;



#ifdef CONFIG_X86_32

	/* This bit is reserved on P4/Xeon and should be cleared */

	if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&

	    (boot_cpu_data.x86 == 15))

		value &= ~APIC_SPIV_FOCUS_DISABLED;

	else

#endif

		value |= APIC_SPIV_FOCUS_DISABLED;

	value |= SPURIOUS_APIC_VECTOR;

	apic_write(APIC_SPIV, value);



	/*

	 * Set up the virtual wire mode.

	 */

	apic_write(APIC_LVT0, APIC_DM_EXTINT);

	value = APIC_DM_NMI;

	if (!lapic_is_integrated())		/* 82489DX */

		value |= APIC_LVT_LEVEL_TRIGGER;

	if (apic_extnmi == APIC_EXTNMI_NONE)

		value |= APIC_LVT_MASKED;

	apic_write(APIC_LVT1, value);

}



/* Init the interrupt delivery mode for the BSP */

void __init apic_intr_mode_init(void)

{

arch/x86/kernel/irqinit.c

+0 −3
Original line number Diff line number Diff line
@@ -60,9 +60,6 @@ void __init init_ISA_irqs(void) 
	struct irq_chip *chip = legacy_pic->chip;

	int i;



#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)

	init_bsp_APIC();

#endif

	legacy_pic->init(0);



	for (i = 0; i < nr_legacy_irqs(); i++)

CRA Git | Maintained and supported by SUSTech CRA and CCSE