Commit b05720cb authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: move SMUM_WAIT_INDIRECT_FIELD_UNEQUAL to hwmgr.h 



the macro is not relevent to SMU, so move to hwmgr.h
and rename to PHM_WAIT_INDIRECT_FIELD_UNEQUAL

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d92cb162

drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

+13 −0
Original line number Diff line number Diff line
@@ -889,4 +889,17 @@ extern int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_t 
	PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, (fieldval)	\

			<< PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field))



#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask)    \

		phm_wait_for_indirect_register_unequal(hwmgr,                   \

				mm##port##_INDEX, index, value, mask)



#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask)    \

		PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)



#define PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval)                          \

		PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, \

				(fieldval) << PHM_FIELD_SHIFT(reg, field), \

					PHM_FIELD_MASK(reg, field) )





#endif /* _HWMGR_H_ */

drivers/gpu/drm/amd/powerplay/inc/smumgr.h

+1 −10
Original line number Diff line number Diff line
@@ -117,6 +117,7 @@ extern void smum_wait_for_indirect_register_unequal( 
				uint32_t indirect_port, uint32_t index,

				uint32_t value, uint32_t mask);





extern int smu_allocate_memory(void *device, uint32_t size,

			 enum cgs_gpu_mem_type type,

			 uint32_t byte_align, uint64_t *mc_addr,
@@ -242,15 +243,5 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr); 
		(fieldval) << SMUM_FIELD_SHIFT(reg, field),		\

		SMUM_FIELD_MASK(reg, field))



#define SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask)    \

	smum_wait_for_indirect_register_unequal(hwmgr,			\

		mm##port##_INDEX, index, value, mask)



#define SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask)    \

	    SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)



#define SMUM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval)                          \

	    SMUM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, (fieldval) << SMUM_FIELD_SHIFT(reg, field), \

			            SMUM_FIELD_MASK(reg, field) )



#endif

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) 
	int result = 0;



	/* Wait for smc boot up */

	/* SMUM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND,

	/* PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND,

		RCU_UC_EVENTS, boot_seq_done, 0); */



	SMUM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,

drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c

+1 −1
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static int iceland_smu_upload_firmware_image(struct pp_hwmgr *hwmgr) 
	}



	/* wait for smc boot up */

	SMUM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND,

	PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND,

					 RCU_UC_EVENTS, boot_seq_done, 0);



	/* clear firmware interrupt enable flag */

CRA Git | Maintained and supported by SUSTech CRA and CCSE