Merge tag 'tegra-for-3.17-delay-timer' of... (b040614c) · Commits · 戴 / test

arch/arm/lib/delay.c

+22 −4

Original line number	Diff line number	Diff line
		@@ -19,6 +19,7 @@
		* Author: Will Deacon <will.deacon@arm.com>
		*/

		#include <linux/clocksource.h>
		#include <linux/delay.h>
		#include <linux/init.h>
		#include <linux/kernel.h>
		@@ -36,6 +37,7 @@ struct arm_delay_ops arm_delay_ops = {

		static const struct delay_timer *delay_timer;
		static bool delay_calibrated;
		static u64 delay_res;

		int read_current_timer(unsigned long *timer_val)
		{
		@@ -47,6 +49,11 @@ int read_current_timer(unsigned long *timer_val)
		}
		EXPORT_SYMBOL_GPL(read_current_timer);

		static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
		{
		return (cyc * mult) >> shift;
		}

		static void __timer_delay(unsigned long cycles)
		{
		cycles_t start = get_cycles();
		@@ -69,18 +76,24 @@ static void __timer_udelay(unsigned long usecs)

		void __init register_current_timer_delay(const struct delay_timer *timer)
		{
		if (!delay_calibrated) {
		pr_info("Switching to timer-based delay loop\n");
		u32 new_mult, new_shift;
		u64 res;

		clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq,
		NSEC_PER_SEC, 3600);
		res = cyc_to_ns(1ULL, new_mult, new_shift);

		if (!delay_calibrated && (!delay_res \|\| (res < delay_res))) {
		pr_info("Switching to timer-based delay loop, resolution %lluns\n", res);
		delay_timer = timer;
		lpj_fine = timer->freq / HZ;
		delay_res = res;

		/* cpufreq may scale loops_per_jiffy, so keep a private copy */
		arm_delay_ops.ticks_per_jiffy = lpj_fine;
		arm_delay_ops.delay = __timer_delay;
		arm_delay_ops.const_udelay = __timer_const_udelay;
		arm_delay_ops.udelay = __timer_udelay;

		delay_calibrated = true;
		} else {
		pr_info("Ignoring duplicate/late registration of read_current_timer delay\n");
		}
		@@ -91,3 +104,8 @@ unsigned long calibrate_delay_is_known(void)
		delay_calibrated = true;
		return lpj_fine;
		}

		void calibration_delay_done(void)
		{
		delay_calibrated = true;
		}

drivers/clocksource/tegra20_timer.c

+13 −0

Original line number	Diff line number	Diff line
		@@ -27,6 +27,7 @@
		#include <linux/of_address.h>
		#include <linux/of_irq.h>
		#include <linux/sched_clock.h>
		#include <linux/delay.h>

		#include <asm/mach/time.h>
		#include <asm/smp_twd.h>
		@@ -53,6 +54,8 @@ static void __iomem *rtc_base;
		static struct timespec persistent_ts;
		static u64 persistent_ms, last_persistent_ms;

		static struct delay_timer tegra_delay_timer;

		#define timer_writel(value, reg) \
		__raw_writel(value, timer_reg_base + (reg))
		#define timer_readl(reg) \
		@@ -139,6 +142,11 @@ static void tegra_read_persistent_clock(struct timespec *ts)
		ts = tsp;
		}

		static unsigned long tegra_delay_timer_read_counter_long(void)
		{
		return readl(timer_reg_base + TIMERUS_CNTR_1US);
		}

		static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
		{
		struct clock_event_device evt = (struct clock_event_device )dev_id;
		@@ -206,6 +214,11 @@ static void __init tegra20_init_timer(struct device_node *np)
		BUG();
		}

		tegra_delay_timer.read_current_timer =
		tegra_delay_timer_read_counter_long;
		tegra_delay_timer.freq = 1000000;
		register_current_timer_delay(&tegra_delay_timer);

		ret = setup_irq(tegra_timer_irq.irq, &tegra_timer_irq);
		if (ret) {
		pr_err("Failed to register timer IRQ: %d\n", ret);

init/calibrate.c

+11 −0

Original line number	Diff line number	Diff line
		@@ -262,6 +262,15 @@ unsigned long __attribute__((weak)) calibrate_delay_is_known(void)
		return 0;
		}

		/*
		* Indicate the cpu delay calibration is done. This can be used by
		* architectures to stop accepting delay timer registrations after this point.
		*/

		void __attribute__((weak)) calibration_delay_done(void)
		{
		}

		void calibrate_delay(void)
		{
		unsigned long lpj;
		@@ -301,4 +310,6 @@ void calibrate_delay(void)

		loops_per_jiffy = lpj;
		printed = true;

		calibration_delay_done();
		}

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