Commit 21760aed authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-r8a7779-multiplatform-for-v3.17' of... 

Merge tag 'renesas-r8a7779-multiplatform-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Pull "Renesas ARM Based SoC r8a7779-multiplatform Updates for v3.17" from
Simon Horman:

Move r8a7779 SoC and its Marzen board to use common clocks,
multiplatform and initialise SCIF (serial) devices using DT.

* tag 'renesas-r8a7779-multiplatform-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (32 commits)
  ARM: shmobile: marzen: Do not use workaround for scif devices
  ARM: shmobile: marzen: Initialise SCIF devices using DT
  ARM: shmobile: marzen: Remove early_printk from command line
  ARM: shmobile: r8a7779: Add scif nodes to dtsi
  ARM: shmobile: r8a7779 dtsi: Correct #address-cells/#size-cells for clocks
  ARM: shmobile: r8a7779 dtsi: Update unit-addresses for clocks
  ARM: shmobile: r8a7779: Remove unused r8a7779_init_delay()
  ARM: shmobile: marzen-reference: Use DT CPU Frequency
  ARM: shmobile: r8a7779: Use DT CPU Frequency in common case
  ARM: shmobile: r8a7779: Add Maximum CPU Frequency to DTS
  ARM: shmobile: marzen-reference: Remove legacy clock support
  ARM: shmobile: Remove Marzen reference DTS
  ARM: shmobile: Let Marzen multiplatform boot with Marzen DTB
  ARM: shmobile: Remove non-multiplatform Marzen reference support
  ARM: shmobile: marzen-reference: Instantiate clkdevs for SCIF and TMU
  ARM: shmobile: marzen-reference: Initialize CPG device
  ARM: shmobile: r8a7779: Initial multiplatform support
  ARM: shmobile: marzen-reference: Move clock and OF device initialisation into board code
  ARM: shmobile: r8a7779: Move r8a7779_earlytimer_init to clock-r8a7779.c
  ARM: shmobile: r8a7779: Add helper to read mode pins
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 5bf521b8 c1a0f993

arch/arm/boot/dts/Makefile

+2 −2
Original line number Diff line number Diff line
@@ -327,7 +327,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \ 
	r8a7778-bockw-reference.dtb \

	r8a7740-armadillo800eva-reference.dtb \

	r8a7779-marzen.dtb \

	r8a7779-marzen-reference.dtb \

	r8a7791-koelsch.dtb \

	r8a7790-lager.dtb \

	sh73a0-kzm9g.dtb \
@@ -339,7 +338,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \ 
	r7s72100-genmai.dtb \

	r8a7791-henninger.dtb \

	r8a7791-koelsch.dtb \

	r8a7790-lager.dtb

	r8a7790-lager.dtb \

	r8a7779-marzen.dtb

dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \

	socfpga_cyclone5_socdk.dtb \

	socfpga_cyclone5_sockit.dtb \

arch/arm/boot/dts/r8a7779-marzen-reference.dts

deleted100644 → 0
+0 −121
Original line number Diff line number Diff line 
/*

 * Reference Device Tree Source for the Marzen board

 *

 * Copyright (C) 2013 Renesas Solutions Corp.

 * Copyright (C) 2013 Simon Horman

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */



/dts-v1/;

#include "r8a7779.dtsi"

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/interrupt-controller/irq.h>



/ {

	model = "marzen";

	compatible = "renesas,marzen-reference", "renesas,r8a7779";



	chosen {

		bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on rw";

	};



	memory {

		device_type = "memory";

		reg = <0x60000000 0x40000000>;

	};



	fixedregulator3v3: fixedregulator@0 {

		compatible = "regulator-fixed";

		regulator-name = "fixed-3.3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-boot-on;

		regulator-always-on;

	};



	lan0@18000000 {

		compatible = "smsc,lan9220", "smsc,lan9115";

		reg = <0x18000000 0x100>;

		pinctrl-0 = <&lan0_pins>;

		pinctrl-names = "default";



		phy-mode = "mii";

		interrupt-parent = <&irqpin0>;

		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;

		smsc,irq-push-pull;

		reg-io-width = <4>;

		vddvario-supply = <&fixedregulator3v3>;

		vdd33a-supply = <&fixedregulator3v3>;

	};



	leds {

		compatible = "gpio-leds";

		led2 {

			gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;

		};

		led3 {

			gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;

		};

		led4 {

			gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;

		};

	};

};



&irqpin0 {

	status = "okay";

};



&pfc {

	pinctrl-0 = <&scif2_pins &scif4_pins>;

	pinctrl-names = "default";



	lan0_pins: lan0 {

		intc {

			renesas,groups = "intc_irq1_b";

			renesas,function = "intc";

		};

		lbsc {

			renesas,groups = "lbsc_ex_cs0";

			renesas,function = "lbsc";

		};

	};



	scif2_pins: serial2 {

		renesas,groups = "scif2_data_c";

		renesas,function = "scif2";

	};



	scif4_pins: serial4 {

		renesas,groups = "scif4_data";

		renesas,function = "scif4";

	};



	sdhi0_pins: sd0 {

		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";

		renesas,function = "sdhi0";

	};



	hspi0_pins: hspi0 {

		renesas,groups = "hspi0";

		renesas,function = "hspi0";

	};

};



&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;

	pinctrl-names = "default";



	vmmc-supply = <&fixedregulator3v3>;

	bus-width = <4>;

	status = "okay";

};



&hspi0 {

	pinctrl-0 = <&hspi0_pins>;

	pinctrl-names = "default";

	status = "okay";

};

arch/arm/boot/dts/r8a7779-marzen.dts

+115 −1
Original line number Diff line number Diff line
@@ -11,17 +11,131 @@ 


/dts-v1/;

#include "r8a7779.dtsi"

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/interrupt-controller/irq.h>



/ {

	model = "marzen";

	compatible = "renesas,marzen", "renesas,r8a7779";



	aliases {

		serial2 = &scif2;

		serial4 = &scif4;

	};



	chosen {

		bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on";

		bootargs = "console=ttySC2,115200 ignore_loglevel root=/dev/nfs ip=on";

	};



	memory {

		device_type = "memory";

		reg = <0x60000000 0x40000000>;

	};



	fixedregulator3v3: fixedregulator@0 {

		compatible = "regulator-fixed";

		regulator-name = "fixed-3.3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-boot-on;

		regulator-always-on;

	};



	lan0@18000000 {

		compatible = "smsc,lan9220", "smsc,lan9115";

		reg = <0x18000000 0x100>;

		pinctrl-0 = <&lan0_pins>;

		pinctrl-names = "default";



		phy-mode = "mii";

		interrupt-parent = <&irqpin0>;

		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;

		smsc,irq-push-pull;

		reg-io-width = <4>;

		vddvario-supply = <&fixedregulator3v3>;

		vdd33a-supply = <&fixedregulator3v3>;

	};



	leds {

		compatible = "gpio-leds";

		led2 {

			gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;

		};

		led3 {

			gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;

		};

		led4 {

			gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;

		};

	};

};



&irqpin0 {

	status = "okay";

};



&extal_clk {

	clock-frequency = <31250000>;

};



&pfc {

	lan0_pins: lan0 {

		intc {

			renesas,groups = "intc_irq1_b";

			renesas,function = "intc";

		};

		lbsc {

			renesas,groups = "lbsc_ex_cs0";

			renesas,function = "lbsc";

		};

	};



	scif2_pins: serial2 {

		renesas,groups = "scif2_data_c";

		renesas,function = "scif2";

	};



	scif4_pins: serial4 {

		renesas,groups = "scif4_data";

		renesas,function = "scif4";

	};



	sdhi0_pins: sd0 {

		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";

		renesas,function = "sdhi0";

	};



	hspi0_pins: hspi0 {

		renesas,groups = "hspi0";

		renesas,function = "hspi0";

	};

};



&scif2 {

       pinctrl-0 = <&scif2_pins>;

       pinctrl-names = "default";



       status = "okay";

};



&scif4 {

       pinctrl-0 = <&scif4_pins>;

       pinctrl-names = "default";



       status = "okay";

};



&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;

	pinctrl-names = "default";



	vmmc-supply = <&fixedregulator3v3>;

	bus-width = <4>;

	status = "okay";

};



&hspi0 {

	pinctrl-0 = <&hspi0_pins>;

	pinctrl-names = "default";

	status = "okay";

};

arch/arm/boot/dts/r8a7779.dtsi

+220 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 


/include/ "skeleton.dtsi"



#include <dt-bindings/clock/r8a7779-clock.h>

#include <dt-bindings/interrupt-controller/irq.h>



/ {
@@ -25,21 +26,25 @@ 
			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <0>;

			clock-frequency = <1000000000>;

		};

		cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <1>;

			clock-frequency = <1000000000>;

		};

		cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <2>;

			clock-frequency = <1000000000>;

		};

		cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <3>;

			clock-frequency = <1000000000>;

		};

	};
@@ -157,6 +162,7 @@ 
		compatible = "renesas,i2c-r8a7779";

		reg = <0xffc70000 0x1000>;

		interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7779_CLK_I2C0>;

		status = "disabled";

	};
@@ -166,6 +172,7 @@ 
		compatible = "renesas,i2c-r8a7779";

		reg = <0xffc71000 0x1000>;

		interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7779_CLK_I2C1>;

		status = "disabled";

	};
@@ -175,6 +182,7 @@ 
		compatible = "renesas,i2c-r8a7779";

		reg = <0xffc72000 0x1000>;

		interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7779_CLK_I2C2>;

		status = "disabled";

	};
@@ -184,6 +192,67 @@ 
		compatible = "renesas,i2c-r8a7779";

		reg = <0xffc73000 0x1000>;

		interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp0_clks R8A7779_CLK_I2C3>;

		status = "disabled";

	};



	scif0: serial@ffe40000 {

		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe40000 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clock-names = "sci_ick";

		status = "disabled";

	};



	scif1: serial@ffe41000 {

		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe41000 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clock-names = "sci_ick";

		status = "disabled";

	};



	scif2: serial@ffe42000 {

		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe42000 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clock-names = "sci_ick";

		status = "disabled";

	};



	scif3: serial@ffe43000 {

		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe43000 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clock-names = "sci_ick";

		status = "disabled";

	};



	scif4: serial@ffe44000 {

		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe44000 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clock-names = "sci_ick";

		status = "disabled";

	};



	scif5: serial@ffe45000 {

		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe45000 0x100>;

		interrupt-parent = <&gic>;

		interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clock-names = "sci_ick";

		status = "disabled";

	};
@@ -201,12 +270,14 @@ 
		compatible = "renesas,rcar-sata";

		reg = <0xfc600000 0x2000>;

		interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp1_clks R8A7779_CLK_SATA>;

	};



	sdhi0: sd@ffe4c000 {

		compatible = "renesas,sdhi-r8a7779";

		reg = <0xffe4c000 0x100>;

		interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7779_CLK_SDHI0>;

		cap-sd-highspeed;

		cap-sdio-irq;

		status = "disabled";
@@ -216,6 +287,7 @@ 
		compatible = "renesas,sdhi-r8a7779";

		reg = <0xffe4d000 0x100>;

		interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7779_CLK_SDHI1>;

		cap-sd-highspeed;

		cap-sdio-irq;

		status = "disabled";
@@ -225,6 +297,7 @@ 
		compatible = "renesas,sdhi-r8a7779";

		reg = <0xffe4e000 0x100>;

		interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7779_CLK_SDHI2>;

		cap-sd-highspeed;

		cap-sdio-irq;

		status = "disabled";
@@ -234,6 +307,7 @@ 
		compatible = "renesas,sdhi-r8a7779";

		reg = <0xffe4f000 0x100>;

		interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7779_CLK_SDHI3>;

		cap-sd-highspeed;

		cap-sdio-irq;

		status = "disabled";
@@ -245,6 +319,7 @@ 
		interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&mstp0_clks R8A7779_CLK_HSPI>;

		status = "disabled";

	};
@@ -254,6 +329,7 @@ 
		interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&mstp0_clks R8A7779_CLK_HSPI>;

		status = "disabled";

	};
@@ -263,6 +339,150 @@ 
		interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&mstp0_clks R8A7779_CLK_HSPI>;

		status = "disabled";

	};



	clocks {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		/* External root clock */

		extal_clk: extal_clk {

			compatible = "fixed-clock";

			#clock-cells = <0>;

			/* This value must be overriden by the board. */

			clock-frequency = <0>;

			clock-output-names = "extal";

		};



		/* Special CPG clocks */

		cpg_clocks: clocks@ffc80000 {

			compatible = "renesas,r8a7779-cpg-clocks";

			reg = <0xffc80000 0x30>;

			clocks = <&extal_clk>;

			#clock-cells = <1>;

			clock-output-names = "plla", "z", "zs", "s",

					     "s1", "p", "b", "out";

		};



		/* Fixed factor clocks */

		i_clk: i_clk {

			compatible = "fixed-factor-clock";

			clocks = <&cpg_clocks R8A7779_CLK_PLLA>;

			#clock-cells = <0>;

			clock-div = <2>;

			clock-mult = <1>;

			clock-output-names = "i";

		};

		s3_clk: s3_clk {

			compatible = "fixed-factor-clock";

			clocks = <&cpg_clocks R8A7779_CLK_PLLA>;

			#clock-cells = <0>;

			clock-div = <8>;

			clock-mult = <1>;

			clock-output-names = "s3";

		};

		s4_clk: s4_clk {

			compatible = "fixed-factor-clock";

			clocks = <&cpg_clocks R8A7779_CLK_PLLA>;

			#clock-cells = <0>;

			clock-div = <16>;

			clock-mult = <1>;

			clock-output-names = "s4";

		};

		g_clk: g_clk {

			compatible = "fixed-factor-clock";

			clocks = <&cpg_clocks R8A7779_CLK_PLLA>;

			#clock-cells = <0>;

			clock-div = <24>;

			clock-mult = <1>;

			clock-output-names = "g";

		};



		/* Gate clocks */

		mstp0_clks: clocks@ffc80030 {

			compatible = "renesas,r8a7779-mstp-clocks",

			             "renesas,cpg-mstp-clocks";

			reg = <0xffc80030 4>;

			clocks = <&cpg_clocks R8A7779_CLK_S>,

			         <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>;

			#clock-cells = <1>;

			renesas,clock-indices = <

				R8A7779_CLK_HSPI R8A7779_CLK_TMU2

				R8A7779_CLK_TMU1 R8A7779_CLK_TMU0

				R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0

				R8A7779_CLK_SCIF5 R8A7779_CLK_SCIF4

				R8A7779_CLK_SCIF3 R8A7779_CLK_SCIF2

				R8A7779_CLK_SCIF1 R8A7779_CLK_SCIF0

				R8A7779_CLK_I2C3 R8A7779_CLK_I2C2

				R8A7779_CLK_I2C1 R8A7779_CLK_I2C0

			>;

			clock-output-names =

				"hspi", "tmu2", "tmu1", "tmu0", "hscif1",

				"hscif0", "scif5", "scif4", "scif3", "scif2",

				"scif1", "scif0", "i2c3", "i2c2", "i2c1",

				"i2c0";

		};

		mstp1_clks: clocks@ffc80034 {

			compatible = "renesas,r8a7779-mstp-clocks",

			             "renesas,cpg-mstp-clocks";

			reg = <0xffc80034 4>, <0xffc80044 4>;

			clocks = <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_S>;

			#clock-cells = <1>;

			renesas,clock-indices = <

				R8A7779_CLK_USB01 R8A7779_CLK_USB2

				R8A7779_CLK_DU R8A7779_CLK_VIN2

				R8A7779_CLK_VIN1 R8A7779_CLK_VIN0

				R8A7779_CLK_ETHER R8A7779_CLK_SATA

				R8A7779_CLK_PCIE R8A7779_CLK_VIN3

			>;

			clock-output-names =

				"usb01", "usb2",

				"du", "vin2",

				"vin1", "vin0",

				"ether", "sata",

				"pcie", "vin3";

		};

		mstp3_clks: clocks@ffc8003c {

			compatible = "renesas,r8a7779-mstp-clocks",

			             "renesas,cpg-mstp-clocks";

			reg = <0xffc8003c 4>;

			clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>,

				 <&s4_clk>, <&s4_clk>;

			#clock-cells = <1>;

			renesas,clock-indices = <

				R8A7779_CLK_SDHI3 R8A7779_CLK_SDHI2

				R8A7779_CLK_SDHI1 R8A7779_CLK_SDHI0

				R8A7779_CLK_MMC1 R8A7779_CLK_MMC0

			>;

			clock-output-names =

				"sdhi3", "sdhi2", "sdhi1", "sdhi0",

				"mmc1", "mmc0";

		};

	};

};

arch/arm/mach-shmobile/Kconfig

+10 −13
Original line number Diff line number Diff line
@@ -25,6 +25,11 @@ config ARCH_R7S72100 
	bool "RZ/A1H (R7S72100)"

	select SYS_SUPPORTS_SH_MTU2



config ARCH_R8A7779

	bool "R-Car H1 (R8A77790)"

	select RENESAS_INTC_IRQPIN

	select SYS_SUPPORTS_SH_TMU



config ARCH_R8A7790

	bool "R-Car H2 (R8A77900)"

	select RENESAS_IRQC
@@ -51,6 +56,11 @@ config MACH_LAGER 
	depends on ARCH_R8A7790

	select MICREL_PHY if SH_ETH



config MACH_MARZEN

	bool "MARZEN board"

	depends on ARCH_R8A7779

	select REGULATOR_FIXED_VOLTAGE if REGULATOR



comment "Renesas ARM SoCs System Configuration"

endif
@@ -234,19 +244,6 @@ config MACH_MARZEN 
	select REGULATOR_FIXED_VOLTAGE if REGULATOR

	select USE_OF



config MACH_MARZEN_REFERENCE

	bool "MARZEN board - Reference Device Tree Implementation"

	depends on ARCH_R8A7779

	select ARCH_REQUIRE_GPIOLIB

	select REGULATOR_FIXED_VOLTAGE if REGULATOR

	select USE_OF

	---help---

	   Use reference implementation of Marzen board support

	   which makes use of device tree at the expense

	   of not supporting a number of devices.



	   This is intended to aid developers



config MACH_LAGER

	bool "Lager board"

	depends on ARCH_R8A7790

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