Commit ad92af7e authored by Jeykumar Sankaran's avatar Jeykumar Sankaran Committed by Rob Clark
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drm/msm/dpu: remove RM topology definition 



RM maintained a redundant definition for display topology
to identify the no. of hw blocks needed for a display
and their hardware dependencies. This information can be
implicitly deduced from the msm_display_topology structure
available in RM reserve request. In addition to getting
rid of the redundant topology, this change also removes
the topology name enums and their usages.

changes in v4:
	- remove the topology name enum entirely (Sean)
changes in v5:
	- remove RM topology definition and their
	  references (Sean)
	- Implement helper for dual mixer CRTC (Sean)
changes in v6:
	- avoid heap memory for topology (Sean)

Signed-off-by: default avatarJeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 157b9ce7

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h

+10 −0
Original line number Diff line number Diff line
@@ -237,6 +237,16 @@ struct dpu_crtc_state { 
#define to_dpu_crtc_state(x) \

	container_of(x, struct dpu_crtc_state, base)



/**

 * dpu_crtc_state_is_stereo - Is crtc virtualized with two mixers?

 * @cstate: Pointer to dpu crtc state

 * @Return: true - has two mixers, false - has one mixer

 */

static inline bool dpu_crtc_state_is_stereo(struct dpu_crtc_state *cstate)

{

	return cstate->num_mixers == CRTC_DUAL_MIXERS;

}



/**

 * dpu_crtc_get_mixer_height - get the mixer height

 * Mixer height will be same as panel height

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+0 −3
Original line number Diff line number Diff line
@@ -1003,7 +1003,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, 
	struct drm_connector *conn = NULL, *conn_iter;

	struct dpu_rm_hw_iter pp_iter, ctl_iter;

	struct msm_display_topology topology;

	enum dpu_rm_topology_name topology_name;

	struct dpu_hw_ctl *hw_ctl[MAX_CHANNELS_PER_ENC] = { NULL };

	int i = 0, ret;
@@ -1059,7 +1058,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, 
		hw_ctl[i] = (struct dpu_hw_ctl *)ctl_iter.hw;

	}



	topology_name = dpu_rm_get_topology_name(topology);

	for (i = 0; i < dpu_enc->num_phys_encs; i++) {

		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
@@ -1080,7 +1078,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, 
			phys->hw_ctl = hw_ctl[i];



			phys->connector = conn->state->connector;

			phys->topology_name = topology_name;

			if (phys->ops.mode_set)

				phys->ops.mode_set(phys, mode, adj_mode);

		}

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h

+0 −1
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ 
/**

 * Encoder functions and data types

 * @intfs:	Interfaces this encoder is using, INTF_MODE_NONE if unused

 * @topology:   Topology of the display

 */

struct dpu_encoder_hw_resources {

	enum dpu_intf_mode intfs[INTF_MAX];

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

+6 −3
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include "dpu_hw_ctl.h"

#include "dpu_hw_top.h"

#include "dpu_encoder.h"

#include "dpu_crtc.h"



#define DPU_ENCODER_NAME_MAX	16
@@ -209,7 +210,6 @@ struct dpu_encoder_irq { 
 * @split_role:		Role to play in a split-panel configuration

 * @intf_mode:		Interface mode

 * @intf_idx:		Interface index on dpu hardware

 * @topology_name:	topology selected for the display

 * @enc_spinlock:	Virtual-Encoder-Wide Spin Lock for IRQ purposes

 * @enable_state:	Enable state tracking

 * @vblank_refcount:	Reference count of vblank request
@@ -237,7 +237,6 @@ struct dpu_encoder_phys { 
	enum dpu_enc_split_role split_role;

	enum dpu_intf_mode intf_mode;

	enum dpu_intf intf_idx;

	enum dpu_rm_topology_name topology_name;

	spinlock_t *enc_spinlock;

	enum dpu_enc_enable_state enable_state;

	atomic_t vblank_refcount;
@@ -355,11 +354,15 @@ void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc); 
static inline enum dpu_3d_blend_mode dpu_encoder_helper_get_3d_blend_mode(

		struct dpu_encoder_phys *phys_enc)

{

	struct dpu_crtc_state *dpu_cstate;



	if (!phys_enc || phys_enc->enable_state == DPU_ENC_DISABLING)

		return BLEND_3D_NONE;



	dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);



	if (phys_enc->split_role == ENC_ROLE_SOLO &&

	    phys_enc->topology_name == DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE)

	    dpu_crtc_state_is_stereo(dpu_cstate))

		return BLEND_3D_H_ROW_INT;



	return BLEND_3D_NONE;

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+4 −3
Original line number Diff line number Diff line
@@ -355,13 +355,14 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx) 


static bool _dpu_encoder_phys_is_dual_ctl(struct dpu_encoder_phys *phys_enc)

{

	struct dpu_crtc_state *dpu_cstate;



	if (!phys_enc)

		return false;



	if (phys_enc->topology_name == DPU_RM_TOPOLOGY_DUALPIPE)

		return true;

	dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);



	return false;

	return dpu_cstate->num_ctls > 1;

}



static bool dpu_encoder_phys_vid_needs_single_flush(

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