Commit accefff5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC OMAP GenPD updates from Arnd Bergmann:
 "These are additional updates for the power domain support on OMAP,
  moving to an implementation based on device tree information instead
  of SoC specific code. This is the latest step in the ongoing process
  for moving code out of arch/arm/mach-omap2.

  I kept this separate from the other driver changes since it touches
  code in multiple areas"

* tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
  ARM: OMAP2+: Fix am4 only build after genpd changes
  ARM: dts: Configure power domain for omap5 dss
  ARM: dts: omap5: add remaining PRM instances
  soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances
  ARM: OMAP2+: Drop legacy platform data for dra7 gpmc
  ARM: dts: Configure interconnect target module for dra7 iva
  ARM: dts: dra7: add remaining PRM instances
  soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
  clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
  ARM: OMAP2+: Drop legacy platform data for omap4 gpmc
  ARM: OMAP2+: Drop legacy platform data for omap4 iva
  ARM: dts: Configure power domain for omap4 dsp
  ARM: dts: Configure power domain for omap4 dss
  ARM: dts: omap4: add remaining PRM instances
  soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances
  clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks
  ARM: OMAP2+: Drop legacy remaining legacy platform data for am4
  ARM: dts: Use simple-pm-bus for genpd for am4 l3
  ARM: dts: Move am4 l3 noc to a separate node
  ARM: dts: Use simple-pm-bus for genpd for am4 l4_per
  ...
parents 48c1c40a 7fbee7e3

arch/arm/boot/dts/am335x-nano.dts

+0 −1
Original line number Diff line number Diff line
@@ -238,7 +238,6 @@ 


&gpmc {

	compatible = "ti,am3352-gpmc";

	ti,hwmods = "gpmc";

	status = "okay";

	gpmc,num-waitpins = <2>;

	pinctrl-names = "default";

arch/arm/boot/dts/am33xx-l4.dtsi

+55 −20
Original line number Diff line number Diff line 
&l4_wkup {						/* 0x44c00000 */

	compatible = "ti,am33xx-l4-wkup", "simple-bus";

	compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";

	power-domains = <&prm_wkup>;

	clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;

	clock-names = "fck";

	reg = <0x44c00000 0x800>,

	      <0x44c00800 0x800>,

	      <0x44c01000 0x400>,
@@ -12,7 +15,7 @@ 
		 <0x00200000 0x44e00000 0x100000>;	/* segment 2 */



	segment@0 {					/* 0x44c00000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -22,7 +25,7 @@ 
	};



	segment@100000 {					/* 0x44d00000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00100000 0x004000>,	/* ap 4 */
@@ -34,23 +37,27 @@ 
			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x0 0x4>;

			reg-names = "rev";

			clocks = <&l4_wkup_aon_clkctrl AM3_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x0 0x4000>;

			status = "disabled";

		};

			ranges = <0x00000000 0x00000000 0x4000>,

				 <0x00080000 0x00080000 0x2000>;



		target-module@80000 {			/* 0x44d80000, ap 6 10.0 */

			compatible = "ti,sysc";

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x80000 0x2000>;

			wkup_m3: cpu@0 {

				compatible = "ti,am3352-wkup-m3";

				reg = <0x00000000 0x4000>,

				      <0x00080000 0x2000>;

				reg-names = "umem", "dmem";

				resets = <&prm_wkup 3>;

				reset-names = "rstctrl";

				ti,pm-firmware = "am335x-pm-firmware.elf";

			};

		};

	};



	segment@200000 {					/* 0x44e00000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00200000 0x002000>,	/* ap 8 */
@@ -274,6 +281,9 @@ 
			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x10000 0x4>;

			reg-names = "rev";

			clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_CONTROL_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x00000000 0x00010000 0x00010000>,
@@ -433,6 +443,7 @@ 
					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */

			power-domains = <&prm_rtc>;

			clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;
@@ -658,7 +669,10 @@ 
};



&l4_fast {					/* 0x4a000000 */

	compatible = "ti,am33xx-l4-fast", "simple-bus";

	compatible = "ti,am33xx-l4-fast", "simple-pm-bus";

	power-domains = <&prm_per>;

	clocks = <&l4hs_clkctrl AM3_L4HS_L4_HS_CLKCTRL 0>;

	clock-names = "fck";

	reg = <0x4a000000 0x800>,

	      <0x4a000800 0x800>,

	      <0x4a001000 0x400>;
@@ -668,7 +682,7 @@ 
	ranges = <0x00000000 0x4a000000 0x1000000>;	/* segment 0 */



	segment@0 {					/* 0x4a000000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -837,7 +851,10 @@ 
};



&l4_per {						/* 0x48000000 */

	compatible = "ti,am33xx-l4-per", "simple-bus";

	compatible = "ti,am33xx-l4-per", "simple-pm-bus";

	power-domains = <&prm_per>;

	clocks = <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;

	clock-names = "fck";

	reg = <0x48000000 0x800>,

	      <0x48000800 0x800>,

	      <0x48001000 0x400>,
@@ -855,7 +872,7 @@ 
		 <0x46400000 0x46400000 0x400000>;	/* l3 data port */



	segment@0 {					/* 0x48000000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -1466,7 +1483,7 @@ 
	};



	segment@100000 {					/* 0x48100000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x0008c000 0x0018c000 0x001000>,	/* ap 42 */
@@ -1850,13 +1867,31 @@ 
	};



	segment@200000 {					/* 0x48200000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00200000 0x010000>;



		target-module@0 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			power-domains = <&prm_mpu>;

			clocks = <&mpu_clkctrl AM3_MPU_MPU_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0x10000>;



			mpu@0 {

				compatible = "ti,omap3-mpu";

				pm-sram = <&pm_sram_code

					   &pm_sram_data>;

			};

		};

	};



	segment@300000 {					/* 0x48300000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00300000 0x001000>,	/* ap 66 */

arch/arm/boot/dts/am33xx.dtsi

+126 −59
Original line number Diff line number Diff line
@@ -144,11 +144,28 @@ 
		};

	};



	pmu@4b000000 {

	target-module@4b000000 {

		compatible = "ti,sysc-omap4-simple", "ti,sysc";

		clocks = <&l3_clkctrl AM3_L3_L3_INSTR_CLKCTRL 0>;

		clock-names = "fck";

		ti,no-idle;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x0 0x4b000000 0x1000000>;



		target-module@140000 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			clocks = <&l3_aon_clkctrl AM3_L3_AON_DEBUGSS_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x140000 0xec0000>;



			pmu@0 {

				compatible = "arm,cortex-a8-pmu";

				interrupts = <3>;

		reg = <0x4b000000 0x1000000>;

		ti,hwmods = "debugss";

			};

		};

	};



	/*
@@ -157,12 +174,6 @@ 
	 */

	soc {

		compatible = "ti,omap-infra";

		mpu {

			compatible = "ti,omap3-mpu";

			ti,hwmods = "mpu";

			pm-sram = <&pm_sram_code

				   &pm_sram_data>;

		};

	};



	/*
@@ -173,21 +184,15 @@ 
	 * the whole bus hierarchy.

	 */

	ocp: ocp {

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		power-domains = <&prm_per>;

		clocks = <&l3_clkctrl AM3_L3_L3_MAIN_CLKCTRL 0>;

		clock-names = "fck";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		ti,hwmods = "l3_main";



		l4_wkup: interconnect@44c00000 {

			wkup_m3: wkup_m3@100000 {

				compatible = "ti,am3352-wkup-m3";

				reg = <0x100000 0x4000>,

				      <0x180000 0x2000>;

				reg-names = "umem", "dmem";

				ti,hwmods = "wkup_m3";

				ti,pm-firmware = "am335x-pm-firmware.elf";

			};

		};

		l4_per: interconnect@48000000 {

		};
@@ -458,10 +463,19 @@ 
			};

		};



		ocmcram: sram@40300000 {

		target-module@40300000 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			clocks = <&l3_clkctrl AM3_L3_OCMCRAM_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x40300000 0x10000>;



			ocmcram: sram@0 {

				compatible = "mmio-sram";

			reg = <0x40300000 0x10000>; /* 64k */

			ranges = <0x0 0x40300000 0x10000>;

				reg = <0 0x10000>; /* 64k */

				ranges = <0 0 0x10000>;

				#address-cells = <1>;

				#size-cells = <1>;
@@ -477,21 +491,47 @@ 
					pool;

				};

			};

		};



		target-module@4c000000 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			reg = <0x4c000000 0x4>;

			reg-names = "rev";

			clocks = <&l3_clkctrl AM3_L3_EMIF_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x4c000000 0x1000000>;



		emif: emif@4c000000 {

			emif: emif@0 {

				compatible = "ti,emif-am3352";

			reg = <0x4c000000 0x1000000>;

			ti,hwmods = "emif";

				reg = <0 0x1000000>;

				interrupts = <101>;

				sram = <&pm_sram_code

					&pm_sram_data>;

			ti,no-idle;

			};

		};



		target-module@50000000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			reg = <0x50000000 4>,

			      <0x50000010 4>,

			      <0x50000014 4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			clocks = <&l3s_clkctrl AM3_L3S_GPMC_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x50000000 0x50000000 0x00001000>, /* regs */

				 <0x00000000 0x00000000 0x40000000>; /* data */



			gpmc: gpmc@50000000 {

				compatible = "ti,am3352-gpmc";

			ti,hwmods = "gpmc";

			ti,no-idle-on-init;

				reg = <0x50000000 0x2000>;

				interrupts = <100>;

				dmas = <&edma 52 0>;
@@ -506,6 +546,7 @@ 
				#gpio-cells = <2>;

				status = "disabled";

			};

		};



		sham_target: target-module@53100000 {

			compatible = "ti,sysc-omap3-sham", "ti,sysc";
@@ -601,12 +642,20 @@ 
		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";

		reg = <0xc00 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_wkup: prm@d00 {

		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";

		reg = <0xd00 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_mpu: prm@e00 {

		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";

		reg = <0xe00 0x100>;

		#power-domain-cells = <0>;

	};



	prm_device: prm@f00 {
@@ -615,16 +664,31 @@ 
		#reset-cells = <1>;

	};



	prm_rtc: prm@1000 {

		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";

		reg = <0x1000 0x100>;

		#power-domain-cells = <0>;

	};



	prm_gfx: prm@1100 {

		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";

		reg = <0x1100 0x100>;

		#power-domain-cells = <0>;

		#reset-cells = <1>;

	};



	prm_cefuse: prm@1200 {

		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";

		reg = <0x1200 0x100>;

		#power-domain-cells = <0>;

	};

};



/* Preferred always-on timer for clocksource */

&timer1_target {

	clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>,

		 <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;

	clock-names = "fck", "ick";

	ti,no-reset-on-init;

	ti,no-idle;

	timer@0 {
@@ -635,6 +699,9 @@ 


/* Preferred timer for clockevent */

&timer2_target {

	clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>,

		 <&l4ls_clkctrl AM3_L4LS_L4_LS_CLKCTRL 0>;

	clock-names = "fck", "ick";

	ti,no-reset-on-init;

	ti,no-idle;

	timer@0 {

arch/arm/boot/dts/am4372.dtsi

+118 −57
Original line number Diff line number Diff line
@@ -107,12 +107,6 @@ 


	soc {

		compatible = "ti,omap-infra";

		mpu {

			compatible = "ti,omap4-mpu";

			ti,hwmods = "mpu";

			pm-sram = <&pm_sram_code

				   &pm_sram_data>;

		};

	};



	gic: interrupt-controller@48241000 {
@@ -161,41 +155,49 @@ 
	};



	ocp@44000000 {

		compatible = "ti,am4372-l3-noc", "simple-bus";

		compatible = "simple-pm-bus";

		power-domains = <&prm_per>;

		clocks = <&l3_clkctrl AM4_L3_L3_MAIN_CLKCTRL 0>;

		clock-names = "fck";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		ti,hwmods = "l3_main";

		ti,no-idle;

		reg = <0x44000000 0x400000

		       0x44800000 0x400000>;



		l3-noc@44000000 {

			compatible = "ti,am4372-l3-noc";

			reg = <0x44000000 0x400000>,

			      <0x44800000 0x400000>;

			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

		};



		l4_wkup: interconnect@44c00000 {

			wkup_m3: wkup_m3@100000 {

				compatible = "ti,am4372-wkup-m3";

				reg = <0x100000 0x4000>,

				      <0x180000	0x2000>;

				reg-names = "umem", "dmem";

				ti,hwmods = "wkup_m3";

				ti,pm-firmware = "am335x-pm-firmware.elf";

			};

		};

		l4_per: interconnect@48000000 {

		};

		l4_fast: interconnect@4a000000 {

		};



		emif: emif@4c000000 {

		target-module@4c000000 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			reg = <0x4c000000 0x4>;

			reg-names = "rev";

			clocks = <&emif_clkctrl AM4_EMIF_EMIF_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x4c000000 0x1000000>;



			emif: emif@0 {

				compatible = "ti,emif-am4372";

			reg = <0x4c000000 0x1000000>;

			ti,hwmods = "emif";

				reg = <0 0x1000000>;

				interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;

			ti,no-idle;

				sram = <&pm_sram_code

					&pm_sram_data>;

			};

		};



		target-module@49000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";
@@ -434,9 +436,25 @@ 
			ranges = <0x0 0x54400000 0x80000>;

		};



		target-module@50000000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			reg = <0x50000000 4>,

			      <0x50000010 4>,

			      <0x50000014 4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			clocks = <&l3s_clkctrl AM4_L3S_GPMC_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x50000000 0x50000000 0x00001000>, /* regs */

				 <0x00000000 0x00000000 0x40000000>; /* data */



			gpmc: gpmc@50000000 {

				compatible = "ti,am3352-gpmc";

			ti,hwmods = "gpmc";

				dmas = <&edma 52 0>;

				dma-names = "rxtx";

				clocks = <&l3s_gclk>;
@@ -453,6 +471,7 @@ 
				#gpio-cells = <2>;

				status = "disabled";

			};

		};



		target-module@47900000 {

			compatible = "ti,sysc-omap4", "ti,sysc";
@@ -484,10 +503,19 @@ 
			};

		};



		ocmcram: sram@40300000 {

		target-module@40300000 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			clocks = <&l3_clkctrl AM4_L3_OCMCRAM_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x40300000 0x40000>;



			ocmcram: sram@0 {

				compatible = "mmio-sram";

			reg = <0x40300000 0x40000>; /* 256k */

			ranges = <0x0 0x40300000 0x40000>;

				reg = <0 0x40000>; /* 256k */

				ranges = <0 0 0x40000>;

				#address-cells = <1>;

				#size-cells = <1>;
@@ -503,6 +531,7 @@ 
					pool;

				};

			};

		};



		target-module@56000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";
@@ -531,6 +560,12 @@ 
#include "am43xx-clocks.dtsi"



&prcm {

	prm_mpu: prm@300 {

		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";

		reg = <0x300 0x100>;

		#power-domain-cells = <0>;

	};



	prm_gfx: prm@400 {

		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";

		reg = <0x400 0x100>;
@@ -538,16 +573,36 @@ 
		#reset-cells = <1>;

	};



	prm_rtc: prm@500 {

		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";

		reg = <0x500 0x100>;

		#power-domain-cells = <0>;

	};



	prm_tamper: prm@600 {

		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";

		reg = <0x600 0x100>;

		#power-domain-cells = <0>;

	};



	prm_cefuse: prm@700 {

		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";

		reg = <0x700 0x100>;

		#power-domain-cells = <0>;

	};



	prm_per: prm@800 {

		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";

		reg = <0x800 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_wkup: prm@2000 {

		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";

		reg = <0x2000 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_device: prm@4000 {
@@ -561,6 +616,9 @@ 
&timer1_target {

	ti,no-reset-on-init;

	ti,no-idle;

	clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>,

		 <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;

	clock-names = "fck", "ick";

	timer@0 {

		assigned-clocks = <&timer1_fck>;

		assigned-clock-parents = <&sys_clkin_ck>;
@@ -571,6 +629,9 @@ 
&timer2_target {

	ti,no-reset-on-init;

	ti,no-idle;

	clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>,

		 <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;

	clock-names = "fck", "ick";

	timer@0 {

		assigned-clocks = <&timer2_fck>;

		assigned-clock-parents = <&sys_clkin_ck>;

arch/arm/boot/dts/am437x-l4.dtsi

+58 −21
Original line number Diff line number Diff line 
&l4_wkup {						/* 0x44c00000 */

	compatible = "ti,am4-l4-wkup", "simple-bus";

	compatible = "ti,am4-l4-wkup", "simple-pm-bus";

	power-domains = <&prm_wkup>;

	clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;

	clock-names = "fck";

	reg = <0x44c00000 0x800>,

	      <0x44c00800 0x800>,

	      <0x44c01000 0x400>,
@@ -12,7 +15,7 @@ 
		 <0x00200000 0x44e00000 0x100000>;	/* segment 2 */



	segment@0 {					/* 0x44c00000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -22,7 +25,7 @@ 
	};



	segment@100000 {					/* 0x44d00000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00100000 0x004000>,	/* ap 4 */
@@ -32,19 +35,25 @@ 
			 <0x000f0000 0x001f0000 0x010000>;	/* ap 8 */



		target-module@0 {			/* 0x44d00000, ap 4 28.0 */

			compatible = "ti,sysc";

			status = "disabled";

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x0 0x4>;

			reg-names = "rev";

			clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x0 0x4000>;

		};

			ranges = <0x00000000 0x00000000 0x4000>,

				 <0x00080000 0x00080000 0x2000>;



		target-module@80000 {			/* 0x44d80000, ap 6 10.0 */

			compatible = "ti,sysc";

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x80000 0x2000>;

			wkup_m3: cpu@0 {

				compatible = "ti,am4372-wkup-m3";

				reg = <0x00000000 0x4000>,

				      <0x00080000 0x2000>;

				reg-names = "umem", "dmem";

				resets = <&prm_wkup 3>;

				reset-names = "rstctrl";

				ti,pm-firmware = "am335x-pm-firmware.elf";

			};

		};



		target-module@f0000 {			/* 0x44df0000, ap 8 58.0 */
@@ -75,7 +84,7 @@ 
	};



	segment@200000 {					/* 0x44e00000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00200000 0x001000>,	/* ap 9 */
@@ -265,6 +274,9 @@ 
			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x10000 0x4>;

			reg-names = "rev";

			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_CONTROL_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0x10000 0x10000>;
@@ -419,6 +431,7 @@ 
					<SYSC_IDLE_SMART>,

					<SYSC_IDLE_SMART_WKUP>;

			/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */

			power-domains = <&prm_rtc>;

			clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;
@@ -479,7 +492,10 @@ 
};



&l4_fast {					/* 0x4a000000 */

	compatible = "ti,am4-l4-fast", "simple-bus";

	compatible = "ti,am4-l4-fast", "simple-pm-bus";

	power-domains = <&prm_per>;

	clocks = <&l3_clkctrl AM4_L3_L4_HS_CLKCTRL 0>;

	clock-names = "fck";

	reg = <0x4a000000 0x800>,

	      <0x4a000800 0x800>,

	      <0x4a001000 0x400>;
@@ -489,7 +505,7 @@ 
	ranges = <0x00000000 0x4a000000 0x1000000>;	/* segment 0 */



	segment@0 {					/* 0x4a000000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -594,7 +610,10 @@ 
};



&l4_per {					/* 0x48000000 */

	compatible = "ti,am4-l4-per", "simple-bus";

	compatible = "ti,am4-l4-per", "simple-pm-bus";

	power-domains = <&prm_per>;

	clocks = <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;

	clock-names = "fck";

	reg = <0x48000000 0x800>,

	      <0x48000800 0x800>,

	      <0x48001000 0x400>,
@@ -612,7 +631,7 @@ 
		 <0x46400000 0x46400000 0x400000>;	/* l3 data port */



	segment@0 {					/* 0x48000000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -1187,7 +1206,7 @@ 
	};



	segment@100000 {					/* 0x48100000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x0008c000 0x0018c000 0x001000>,	/* ap 34 */
@@ -1618,13 +1637,31 @@ 
	};



	segment@200000 {					/* 0x48200000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00200000 0x010000>;



		target-module@0 {

			compatible = "ti,sysc-omap4-simple", "ti,sysc";

			power-domains = <&prm_mpu>;

			clocks = <&mpu_clkctrl AM4_MPU_MPU_CLKCTRL 0>;

			clock-names = "fck";

			ti,no-idle;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0 0x10000>;



			mpu@0 {

				compatible = "ti,omap4-mpu";

				pm-sram = <&pm_sram_code

					   &pm_sram_data>;

			};

		};

	};



	segment@300000 {					/* 0x48300000 */

		compatible = "simple-bus";

		compatible = "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x00300000 0x001000>,	/* ap 56 */

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