Commit 7fbee7e3 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v5.11/genpd-rest-signed' of... 

Merge tag 'omap-for-v5.11/genpd-rest-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/omap-genpd

Remaining genpd changes for omaps for v5.11

This series contains the remaining genpd changes for omap4/5,
and dra7 to add the power domain and reset control data to
omap-prm driver. We also update several devices to probe without
platform data to get us closer to booting omap4/5, and dra7
without platform data.

There is also a build fix for the earlier am437x series that
I should have applied into a separate branch on top of the
am437x breaking commit. It ended here as I was originally
planning to send out a single pull request for all the genpd
changes, but then decided to break it down to smaller chunks.
It's all really a larger single git branch though, so this
should be OK and I really did not want to start reorganizing
the branch after testing it and having it sit in Linux next.

The changes done here are:

- Clock driver needs idlest check dropped for IVA for omap4
  and dra7

- Add remaining power domain and reset control data to
  omap-prm driver for omap4/5 and dra7

- Add device tree data for remaining power domains and
  reset control for omap4/5 and dra7 dts files

- Update dss, dsp, iva and gpmc dts files to use genpd
  and to drop the remaining platform data

- Update dss for omap5 to use genpd

- Update dra7 iva to to use genpd and to drop the remaining
  platform data

* tag 'omap-for-v5.11/genpd-rest-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix am4 only build after genpd changes
  ARM: dts: Configure power domain for omap5 dss
  ARM: dts: omap5: add remaining PRM instances
  soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances
  ARM: OMAP2+: Drop legacy platform data for dra7 gpmc
  ARM: dts: Configure interconnect target module for dra7 iva
  ARM: dts: dra7: add remaining PRM instances
  soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
  clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
  ARM: OMAP2+: Drop legacy platform data for omap4 gpmc
  ARM: OMAP2+: Drop legacy platform data for omap4 iva
  ARM: dts: Configure power domain for omap4 dsp
  ARM: dts: Configure power domain for omap4 dss
  ARM: dts: omap4: add remaining PRM instances
  soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances
  clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks

Link: https://lore.kernel.org/r/pull-1606806458-694517@atomide.com-4


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents eb672def b62168e5

arch/arm/boot/dts/dra7.dtsi

+136 −15
Original line number Diff line number Diff line
@@ -724,9 +724,26 @@ 


		/* OCP2SCP1 */

		/* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */



		target-module@50000000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			reg = <0x50000000 4>,

			      <0x50000010 4>,

			      <0x50000014 4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			clocks = <&l3main1_clkctrl DRA7_L3MAIN1_GPMC_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x50000000 0x50000000 0x00001000>, /* regs */

				 <0x00000000 0x00000000 0x40000000>; /* data */



			gpmc: gpmc@50000000 {

				compatible = "ti,am3352-gpmc";

			ti,hwmods = "gpmc";

				reg = <0x50000000 0x37c>;      /* device IO registers */

				interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

				dmas = <&edma_xbar 4 0>;
@@ -741,6 +758,7 @@ 
				#gpio-cells = <2>;

				status = "disabled";

			};

		};



		target-module@56000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";
@@ -962,6 +980,32 @@ 
			};

		};



		iva_hd_target: target-module@5a000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x5a05a400 0x4>,

			      <0x5a05a410 0x4>;

			reg-names = "rev", "sysc";

			ti,sysc-midle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			power-domains = <&prm_iva>;

			resets = <&prm_iva 2>;

			reset-names = "rstctrl";

			clocks = <&iva_clkctrl DRA7_IVA_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x5a000000 0x5a000000 0x1000000>,

				 <0x5b000000 0x5b000000 0x1000000>;



			iva {

				compatible = "ti,ivahd";

			};

		};



		opp_supply_mpu: opp-supply@4a003b20 {

			compatible = "ti,omap5-opp-supply";

			reg = <0x4a003b20 0xc>;
@@ -1031,53 +1075,130 @@ 
#include "dra7xx-clocks.dtsi"



&prm {

	prm_mpu: prm@300 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x300 0x100>;

		#power-domain-cells = <0>;

	};



	prm_dsp1: prm@400 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x400 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_ipu: prm@500 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x500 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_coreaon: prm@628 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x628 0xd8>;

		#power-domain-cells = <0>;

	};



	prm_core: prm@700 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x700 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_iva: prm@f00 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0xf00 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_cam: prm@1000 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1000 0x100>;

		#power-domain-cells = <0>;

	};



	prm_dss: prm@1100 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1100 0x100>;

		#power-domain-cells = <0>;

	};



	prm_gpu: prm@1200 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1200 0x100>;

		#power-domain-cells = <0>;

	};



	prm_l3init: prm@1300 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1300 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_l4per: prm@1400 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1400 0x100>;

		#power-domain-cells = <0>;

	};



	prm_custefuse: prm@1600 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1600 0x100>;

		#power-domain-cells = <0>;

	};



	prm_wkupaon: prm@1724 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1724 0x100>;

		#power-domain-cells = <0>;

	};



	prm_dsp2: prm@1b00 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1b00 0x40>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_eve1: prm@1b40 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1b40 0x40>;

		#power-domain-cells = <0>;

	};



	prm_eve2: prm@1b80 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1b80 0x40>;

		#power-domain-cells = <0>;

	};



	prm_eve3: prm@1bc0 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1bc0 0x40>;

		#power-domain-cells = <0>;

	};



	prm_eve4: prm@1c00 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1c00 0x60>;

		#power-domain-cells = <0>;

	};



	prm_rtc: prm@1c60 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1c60 0x20>;

		#power-domain-cells = <0>;

	};



	prm_vpe: prm@1c80 {

		compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";

		reg = <0x1c80 0x80>;

		#power-domain-cells = <0>;

	};

};

arch/arm/boot/dts/dra7xx-clocks.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -1726,6 +1726,20 @@ 
		};

	};



	iva_cm: iva-cm@f00 {

		compatible = "ti,omap4-cm";

		reg = <0xf00 0x100>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0xf00 0x100>;



		iva_clkctrl: iva-clkctrl@20 {

			compatible = "ti,clkctrl";

			reg = <0x20 0xc>;

			#clock-cells = <2>;

		};

	};



	cam_cm: cam-cm@1000 {

		compatible = "ti,omap4-cm";

		reg = <0x1000 0x100>;

arch/arm/boot/dts/omap4-l4.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -330,6 +330,7 @@ 
			/* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */

			clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;

			clock-names = "fck";

			power-domains = <&prm_tesla>;

			resets = <&prm_tesla 1>;

			reset-names = "rstctrl";

			#address-cells = <1>;

arch/arm/boot/dts/omap4.dtsi

+129 −21
Original line number Diff line number Diff line
@@ -107,11 +107,6 @@ 
			ti,hwmods = "mpu";

			sram = <&ocmcram>;

		};



		iva {

			compatible = "ti,ivahd";

			ti,hwmods = "iva";

		};

	};



	/*
@@ -150,6 +145,24 @@ 
			reg = <0x40304000 0xa000>; /* 40k */

		};



		target-module@50000000 {

			compatible = "ti,sysc-omap2", "ti,sysc";

			reg = <0x50000000 4>,

			      <0x50000010 4>,

			      <0x50000014 4>;

			reg-names = "rev", "sysc", "syss";

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,syss-mask = <1>;

			ti,no-idle-on-init;

			clocks = <&l3_2_clkctrl OMAP4_GPMC_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x50000000 0x50000000 0x00001000>, /* regs */

				 <0x00000000 0x00000000 0x40000000>; /* data */



			gpmc: gpmc@50000000 {

				compatible = "ti,omap4430-gpmc";

				reg = <0x50000000 0x1000>;
@@ -160,8 +173,6 @@ 
				dma-names = "rxtx";

				gpmc,num-cs = <8>;

				gpmc,num-waitpins = <4>;

			ti,hwmods = "gpmc";

			ti,no-idle-on-init;

				clocks = <&l3_div_ck>;

				clock-names = "fck";

				interrupt-controller;
@@ -169,6 +180,7 @@ 
				gpio-controller;

				#gpio-cells = <2>;

			};

		};



		target-module@52000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";
@@ -445,6 +457,7 @@ 
			      <0x58000014 4>;

			reg-names = "rev", "syss";

			ti,syss-mask = <1>;

			power-domains = <&prm_dss>;

			clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 0>,

				 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,

				 <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>,
@@ -650,6 +663,32 @@ 
				};

			};

		};



		iva_hd_target: target-module@5a000000 {

			compatible = "ti,sysc-omap4", "ti,sysc";

			reg = <0x5a05a400 0x4>,

			      <0x5a05a410 0x4>;

			reg-names = "rev", "sysc";

			ti,sysc-midle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			power-domains = <&prm_ivahd>;

			resets = <&prm_ivahd 2>;

			reset-names = "rstctrl";

			clocks = <&ivahd_clkctrl OMAP4_IVA_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x5a000000 0x5a000000 0x1000000>,

				 <0x5b000000 0x5b000000 0x1000000>;



			iva {

				compatible = "ti,ivahd";

			};

		};

	};

};
@@ -658,10 +697,17 @@ 
#include "omap44xx-clocks.dtsi"



&prm {

	prm_mpu: prm@300 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x300 0x100>;

		#power-domain-cells = <0>;

	};



	prm_tesla: prm@400 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x400 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_abe: prm@500 {
@@ -670,16 +716,78 @@ 
		#power-domain-cells = <0>;

	};



	prm_always_on_core: prm@600 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x600 0x100>;

		#power-domain-cells = <0>;

	};



	prm_core: prm@700 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x700 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_ivahd: prm@f00 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0xf00 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_cam: prm@1000 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1000 0x100>;

		#power-domain-cells = <0>;

	};



	prm_dss: prm@1100 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1100 0x100>;

		#power-domain-cells = <0>;

	};



	prm_gfx: prm@1200 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1200 0x100>;

		#power-domain-cells = <0>;

	};



	prm_l3init: prm@1300 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1300 0x100>;

		#power-domain-cells = <0>;

	};



	prm_l4per: prm@1400 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1400 0x100>;

		#power-domain-cells = <0>;

	};



	prm_cefuse: prm@1600 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1600 0x100>;

		#power-domain-cells = <0>;

	};



	prm_wkup: prm@1700 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1700 0x100>;

		#power-domain-cells = <0>;

	};



	prm_emu: prm@1900 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1900 0x100>;

		#power-domain-cells = <0>;

	};



	prm_dss: prm@1100 {

		compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";

		reg = <0x1100 0x40>;

		#power-domain-cells = <0>;

	};



	prm_device: prm@1b00 {

arch/arm/boot/dts/omap5.dtsi

+58 −0
Original line number Diff line number Diff line
@@ -410,6 +410,7 @@ 
			      <0x58000014 4>;

			reg-names = "rev", "syss";

			ti,syss-mask = <1>;

			power-domains = <&prm_dss>;

			clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 0>,

				 <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 9>,

				 <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>,
@@ -670,10 +671,17 @@ 
#include "omap54xx-clocks.dtsi"



&prm {

	prm_mpu: prm@300 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x300 0x100>;

		#power-domain-cells = <0>;

	};



	prm_dsp: prm@400 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x400 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_abe: prm@500 {
@@ -682,16 +690,66 @@ 
		#power-domain-cells = <0>;

	};



	prm_coreaon: prm@600 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x600 0x100>;

		#power-domain-cells = <0>;

	};



	prm_core: prm@700 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x700 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_iva: prm@1200 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1200 0x100>;

		#reset-cells = <1>;

		#power-domain-cells = <0>;

	};



	prm_cam: prm@1300 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1300 0x100>;

		#power-domain-cells = <0>;

	};



	prm_dss: prm@1400 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1400 0x100>;

		#power-domain-cells = <0>;

	};



	prm_gpu: prm@1500 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1500 0x100>;

		#power-domain-cells = <0>;

	};



	prm_l3init: prm@1600 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1600 0x100>;

		#power-domain-cells = <0>;

	};



	prm_custefuse: prm@1700 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1700 0x100>;

		#power-domain-cells = <0>;

	};



	prm_wkupaon: prm@1800 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1800 0x100>;

		#power-domain-cells = <0>;

	};



	prm_emu: prm@1a00 {

		compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";

		reg = <0x1a00 0x100>;

		#power-domain-cells = <0>;

	};



	prm_device: prm@1c00 {

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