Commit aaf6c75c authored Feb 07, 2019 by Biju Das Committed by Simon Horman Feb 08, 2019

arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support



Silicon Linux CAT 874 board has 2GB DDR memory. Update the dma-ranges
mapping for pciec0 node. Also declare pcie bus clock, since it is
generated on the CAT874 main board.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

parent 2262798c

arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts

+9 −0

Original line number	Diff line number	Diff line
		@@ -56,6 +56,15 @@
		clock-frequency = <48000000>;
		};

		&pcie_bus_clk {
		clock-frequency = <100000000>;
		};

		&pciec0 {
		/* Map all possible DDR as inbound ranges */
		dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
		};

		&pfc {
		scif2_pins: scif2 {
		groups = "scif2_data_a";

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