Commit aa5452f5 authored by Thierry Reding's avatar Thierry Reding Committed by Kishon Vijay Abraham I
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phy: tegra: xusb: Add Tegra124 PLL power supplies



The Tegra124 SoC has four inputs that consume power in order to supply
the PLLs that drive the various USB, PCI and SATA pads.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Acked-by: default avatarJon Hunter <jonathanh@nvidia.com>
Tested-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent f40043b3
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+9 −0
Original line number Diff line number Diff line
@@ -1721,6 +1721,13 @@ static const struct tegra_xusb_padctl_ops tegra124_xusb_padctl_ops = {
	.hsic_set_idle = tegra124_hsic_set_idle,
};

static const char * const tegra124_xusb_padctl_supply_names[] = {
	"avdd-pll-utmip",
	"avdd-pll-erefe",
	"avdd-pex-pll",
	"hvdd-pex-pll-e",
};

const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc = {
	.num_pads = ARRAY_SIZE(tegra124_pads),
	.pads = tegra124_pads,
@@ -1743,6 +1750,8 @@ const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc = {
		},
	},
	.ops = &tegra124_xusb_padctl_ops,
	.supply_names = tegra124_xusb_padctl_supply_names,
	.num_supplies = ARRAY_SIZE(tegra124_xusb_padctl_supply_names),
};
EXPORT_SYMBOL_GPL(tegra124_xusb_padctl_soc);