Commit a9d4fe2f authored by Nirmoy Das's avatar Nirmoy Das Committed by Alex Deucher
Browse files

drm/amdgpu: remove unnecessary conversion to bool



Better clean that up before some automation starts to complain about it

Signed-off-by: default avatarNirmoy Das <nirmoy.das@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4c461d89
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+1 −1
Original line number Diff line number Diff line
@@ -527,7 +527,7 @@ static int acp_set_powergating_state(void *handle,
				     enum amd_powergating_state state)
{
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
	bool enable = state == AMD_PG_STATE_GATE ? true : false;
	bool enable = (state == AMD_PG_STATE_GATE);

	if (adev->powerplay.pp_funcs &&
		adev->powerplay.pp_funcs->set_powergating_by_smu)
+1 −1
Original line number Diff line number Diff line
@@ -985,7 +985,7 @@ static void amdgpu_device_check_vm_size(struct amdgpu_device *adev)
static void amdgpu_device_check_smu_prv_buffer_size(struct amdgpu_device *adev)
{
	struct sysinfo si;
	bool is_os_64 = (sizeof(void *) == 8) ? true : false;
	bool is_os_64 = (sizeof(void *) == 8);
	uint64_t total_memory;
	uint64_t dram_size_seven_GB = 0x1B8000000;
	uint64_t dram_size_three_GB = 0xB8000000;
+2 −2
Original line number Diff line number Diff line
@@ -74,9 +74,9 @@ int athub_v1_0_set_clockgating(struct amdgpu_device *adev,
	case CHIP_VEGA20:
	case CHIP_RAVEN:
		athub_update_medium_grain_clock_gating(adev,
				state == AMD_CG_STATE_GATE ? true : false);
				state == AMD_CG_STATE_GATE);
		athub_update_medium_grain_light_sleep(adev,
				state == AMD_CG_STATE_GATE ? true : false);
				state == AMD_CG_STATE_GATE);
		break;
	default:
		break;
+2 −2
Original line number Diff line number Diff line
@@ -77,9 +77,9 @@ int athub_v2_0_set_clockgating(struct amdgpu_device *adev,
	case CHIP_NAVI14:
	case CHIP_NAVI12:
		athub_v2_0_update_medium_grain_clock_gating(adev,
				state == AMD_CG_STATE_GATE ? true : false);
				state == AMD_CG_STATE_GATE);
		athub_v2_0_update_medium_grain_light_sleep(adev,
				state == AMD_CG_STATE_GATE ? true : false);
				state == AMD_CG_STATE_GATE);
		break;
	default:
		break;
+2 −2
Original line number Diff line number Diff line
@@ -4229,7 +4229,7 @@ static int gfx_v10_0_set_powergating_state(void *handle,
					  enum amd_powergating_state state)
{
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
	bool enable = (state == AMD_PG_STATE_GATE) ? true : false;
	bool enable = (state == AMD_PG_STATE_GATE);
	switch (adev->asic_type) {
	case CHIP_NAVI10:
	case CHIP_NAVI14:
@@ -4255,7 +4255,7 @@ static int gfx_v10_0_set_clockgating_state(void *handle,
	case CHIP_NAVI14:
	case CHIP_NAVI12:
		gfx_v10_0_update_gfx_clock_gating(adev,
						 state == AMD_CG_STATE_GATE ? true : false);
						 state == AMD_CG_STATE_GATE);
		break;
	default:
		break;
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