Commit a1fb5489 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2020-04-30' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 



Driver Changes:

- Fix GitLab #1698: Performance regression with Linux 5.7-rc1 on
  Iris Plus 655 and 4K screen (Chris)
- Add Wa_14011059788 for Tigerlake (Matt A)
- Add per ctx batchbuffer wa for timestamp for Gen12 (Mika)
- Use indirect ctx bb to load cmd buffer control value
  from context image to avoid corruption (Mika)
- Enable DP Display Audio WA (Uma, Jani)
- Update forcewake firmware ranges for Icelake (Radhakrishna)
- Add missing deinitialization cases of load failure for display (Jose)
- Implement TC cold sequences for Icelake and Tigerlake (Jose)
- Unbreak enable_dpcd_backlight modparam (Lyude)
- Move the late flush_submission in retire to the end (Chris)
- Demote "Reducing compressed framebufer size" message to info (Peter)
- Push MST link retraining to the hotplug work (Ville)
- Hold obj->vma.lock over for_each_ggtt_vma() (Chris)
- Fix timeout handling during TypeC AUX power well enabling for ICL (Imre)
- Fix skl+ non-scaled pfit modes (Ville)
- Prefer soft-rc6 over RPS DOWN_TIMEOUT (Chris)
- Sanitize GT first before poisoning HWSP (Chris)
- Fix up clock RPS frequency readout (Chris)
- Avoid reusing the same logical CCID (Chris)
- Avoid dereferencing a dead context (Chris)
- Always enable busy-stats for execlists (Chris)
- Apply the aggressive downclocking to parking (Chris)
- Restore aggressive post-boost downclocking (Chris)

- Scrub execlists state on resume (Chris)
- Add debugfs attributes for LPSP (Ansuman)
- Improvements to kernel selftests (Chris, Mika)
- Add tiled blits selftest (Zbigniew)
- Fix error handling in __live_lrc_indirect_ctx_bb() (Dan)
- Add pre/post plane updates for SAGV (Stanislav)
- Add ICL PG3 PW ID for EHL (Anshuman)
- Fix Sphinx build duplicate label warning (Jani)
- Error log non-zero audio power refcount after unbind (Jani)
- Remove object_is_locked assertion from unpin_from_display_plane (Chris)
- Use single set of AUX powerwell ops for gen11+ (Matt R)
- Prefer drm_WARN_ON over WARN_ON (Pankaj)
- Poison residual state [HWSP] across resume (Chris, Tvrtko)
- Convert request-before-CS assertion to debug (Chris)
- Carefully order virtual_submission_tasklet (Chris)
- Check carefully for an idle engine in wait-for-idle (Chris)
- Only close vma we open (Chris)
- Trace RPS events (Chris)
- Use the RPM config register to determine clk frequencies (Chris)
- Drop rq->ring->vma peeking from error capture (Chris)
- Check preempt-timeout target before submit_ports (Chris)
- Check HWSP cacheline is valid before acquiring (Chris)
- Use proper fault mask in interrupt postinstall too (Matt R)
- Keep a no-frills swappable copy of the default context state (Chris)

- Add atomic helpers for bandwidth (Stanislav)
- Refactor setting dma info to a common helper from device info (Michael)
- Refactor DDI transcoder code for clairty (Ville)
- Extend PG3 power well ID to ICL (Anshuman)
- Refactor PFIT code for readability and future extensibility (Ville)
- Clarify code split between intel_ddi.c and intel_dp.c (Ville)
- Move out code to return the digital_port of the aux ch (Jose)
- Move rps.enabled/active  and use of RPS interrupts to flags (Chris)
- Remove superfluous inlines and dead code (Jani)
- Re-disable -Wframe-address from top-level Makefile (Nick)
- Static checker and spelling fixes (Colin, Nathan)
- Split long lines (Ville)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200430124904.GA100924@jlahtine-desk.ger.corp.intel.com
parents 3fd911b6 230982d8

drivers/char/agp/intel-gtt.c

+10 −7
Original line number Diff line number Diff line
@@ -1407,13 +1407,16 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, 


	dev_info(&bridge_pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);



	if (bridge) {

		mask = intel_private.driver->dma_mask_size;

		if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))

			dev_err(&intel_private.pcidev->dev,

			"set gfx device dma mask %d-bit failed!\n", mask);

				"set gfx device dma mask %d-bit failed!\n",

				mask);

		else

			pci_set_consistent_dma_mask(intel_private.pcidev,

						    DMA_BIT_MASK(mask));

	}



	if (intel_gtt_init() != 0) {

		intel_gmch_remove();

drivers/gpu/drm/i915/Makefile

+5 −1
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ subdir-ccflags-y += $(call cc-disable-warning, sign-compare) 
subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized)

subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)

subdir-ccflags-y += $(call cc-disable-warning, uninitialized)

subdir-ccflags-y += $(call cc-disable-warning, frame-address)

subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror



# Fine grained warnings disable
@@ -91,6 +92,7 @@ gt-y += \ 
	gt/intel_ggtt.o \

	gt/intel_ggtt_fencing.o \

	gt/intel_gt.o \

	gt/intel_gt_clock_utils.o \

	gt/intel_gt_irq.o \

	gt/intel_gt_pm.o \

	gt/intel_gt_pm_irq.o \
@@ -109,6 +111,7 @@ gt-y += \ 
	gt/intel_sseu.o \

	gt/intel_timeline.o \

	gt/intel_workarounds.o \

	gt/shmem_utils.o \

	gt/sysfs_engines.o

# autogenerated null render state

gt-y += \
@@ -257,7 +260,8 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \ 
	selftests/igt_live_test.o \

	selftests/igt_mmap.o \

	selftests/igt_reset.o \

	selftests/igt_spinner.o

	selftests/igt_spinner.o \

	selftests/librapl.o



# virtual gpu code

i915-y += i915_vgpu.o

drivers/gpu/drm/i915/display/icl_dsi.c

+12 −9
Original line number Diff line number Diff line
@@ -36,14 +36,14 @@ 
#include "intel_panel.h"

#include "intel_vdsc.h"



static inline int header_credits_available(struct drm_i915_private *dev_priv,

static int header_credits_available(struct drm_i915_private *dev_priv,

				    enum transcoder dsi_trans)

{

	return (intel_de_read(dev_priv, DSI_CMD_TXCTL(dsi_trans)) & FREE_HEADER_CREDIT_MASK)

		>> FREE_HEADER_CREDIT_SHIFT;

}



static inline int payload_credits_available(struct drm_i915_private *dev_priv,

static int payload_credits_available(struct drm_i915_private *dev_priv,

				     enum transcoder dsi_trans)

{

	return (intel_de_read(dev_priv, DSI_CMD_TXCTL(dsi_trans)) & FREE_PLOAD_CREDIT_MASK)
@@ -1195,7 +1195,7 @@ static void gen11_dsi_enable(struct intel_atomic_state *state, 
{

	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);



	WARN_ON(crtc_state->has_pch_encoder);

	drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);



	/* step6d: enable dsi transcoder */

	gen11_dsi_enable_transcoder(encoder);
@@ -1525,15 +1525,18 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, 
	struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,

						   base);

	struct intel_connector *intel_connector = intel_dsi->attached_connector;

	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

	const struct drm_display_mode *fixed_mode =

		intel_connector->panel.fixed_mode;

	struct drm_display_mode *adjusted_mode =

		&pipe_config->hw.adjusted_mode;

	int ret;



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	intel_fixed_panel_mode(fixed_mode, adjusted_mode);

	intel_pch_panel_fitting(crtc, pipe_config, conn_state->scaling_mode);



	ret = intel_pch_panel_fitting(pipe_config, conn_state);

	if (ret)

		return ret;



	adjusted_mode->flags = 0;

drivers/gpu/drm/i915/display/intel_atomic_plane.c

+2 −2
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ intel_plane_destroy_state(struct drm_plane *plane, 
			  struct drm_plane_state *state)

{

	struct intel_plane_state *plane_state = to_intel_plane_state(state);

	WARN_ON(plane_state->vma);

	drm_WARN_ON(plane->dev, plane_state->vma);



	__drm_atomic_helper_plane_destroy_state(&plane_state->uapi);

	if (plane_state->hw.fb)
@@ -396,7 +396,7 @@ skl_next_plane_to_commit(struct intel_atomic_state *state, 
	}



	/* should never happen */

	WARN_ON(1);

	drm_WARN_ON(state->base.dev, 1);



	return NULL;

}

drivers/gpu/drm/i915/display/intel_audio.c

+145 −0
Original line number Diff line number Diff line
@@ -514,6 +514,143 @@ static void hsw_audio_codec_disable(struct intel_encoder *encoder, 
	mutex_unlock(&dev_priv->av_mutex);

}



/* Add a factor to take care of rounding and truncations */

#define ROUNDING_FACTOR 10000



static unsigned int get_hblank_early_enable_config(struct intel_encoder *encoder,

						   const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	unsigned int link_clks_available, link_clks_required;

	unsigned int tu_data, tu_line, link_clks_active;

	unsigned int hblank_rise, hblank_early_prog;

	unsigned int h_active, h_total, hblank_delta, pixel_clk, v_total;

	unsigned int fec_coeff, refresh_rate, cdclk, vdsc_bpp;



	h_active = crtc_state->hw.adjusted_mode.crtc_hdisplay;

	h_total = crtc_state->hw.adjusted_mode.crtc_htotal;

	v_total = crtc_state->hw.adjusted_mode.crtc_vtotal;

	pixel_clk = crtc_state->hw.adjusted_mode.crtc_clock;

	refresh_rate = crtc_state->hw.adjusted_mode.vrefresh;

	vdsc_bpp = crtc_state->dsc.compressed_bpp;

	cdclk = i915->cdclk.hw.cdclk;

	/* fec= 0.972261, using rounding multiplier of 1000000 */

	fec_coeff = 972261;



	drm_dbg_kms(&i915->drm, "h_active = %u link_clk = %u :"

		    "lanes = %u vdsc_bpp = %u cdclk = %u\n",

		    h_active, crtc_state->port_clock, crtc_state->lane_count,

		    vdsc_bpp, cdclk);



	if (WARN_ON(!crtc_state->port_clock || !crtc_state->lane_count ||

		    !crtc_state->dsc.compressed_bpp || !i915->cdclk.hw.cdclk))

		return 0;



	link_clks_available = ((((h_total - h_active) *

			       ((crtc_state->port_clock * ROUNDING_FACTOR) /

				pixel_clk)) / ROUNDING_FACTOR) - 28);



	link_clks_required = DIV_ROUND_UP(192000, (refresh_rate *

					  v_total)) * ((48 /

					  crtc_state->lane_count) + 2);



	if (link_clks_available > link_clks_required)

		hblank_delta = 32;

	else

		hblank_delta = DIV_ROUND_UP(((((5 * ROUNDING_FACTOR) /

					    crtc_state->port_clock) + ((5 *

					    ROUNDING_FACTOR) /

					    cdclk)) * pixel_clk),

					    ROUNDING_FACTOR);



	tu_data = (pixel_clk * vdsc_bpp * 8) / ((crtc_state->port_clock *

		   crtc_state->lane_count * fec_coeff) / 1000000);

	tu_line = (((h_active * crtc_state->port_clock * fec_coeff) /

		   1000000) / (64 * pixel_clk));

	link_clks_active  = (tu_line - 1) * 64 + tu_data;



	hblank_rise = ((link_clks_active + 6 * DIV_ROUND_UP(link_clks_active,

			250) + 4) * ((pixel_clk * ROUNDING_FACTOR) /

			crtc_state->port_clock)) / ROUNDING_FACTOR;



	hblank_early_prog = h_active - hblank_rise + hblank_delta;



	return hblank_early_prog;

}



static unsigned int get_sample_room_req_config(const struct intel_crtc_state *crtc_state)

{

	unsigned int h_active, h_total, pixel_clk;

	unsigned int samples_room;



	h_active = crtc_state->hw.adjusted_mode.hdisplay;

	h_total = crtc_state->hw.adjusted_mode.htotal;

	pixel_clk = crtc_state->hw.adjusted_mode.clock;



	samples_room = ((((h_total - h_active) * ((crtc_state->port_clock *

			ROUNDING_FACTOR) / pixel_clk)) /

			ROUNDING_FACTOR) - 12) / ((48 /

			crtc_state->lane_count) + 2);



	return samples_room;

}



static void enable_audio_dsc_wa(struct intel_encoder *encoder,

				const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	enum pipe pipe = crtc->pipe;

	unsigned int hblank_early_prog, samples_room;

	unsigned int val;



	if (INTEL_GEN(i915) < 11)

		return;



	val = intel_de_read(i915, AUD_CONFIG_BE);



	if (INTEL_GEN(i915) == 11)

		val |= HBLANK_EARLY_ENABLE_ICL(pipe);

	else if (INTEL_GEN(i915) >= 12)

		val |= HBLANK_EARLY_ENABLE_TGL(pipe);



	if (crtc_state->dsc.compression_enable &&

	    (crtc_state->hw.adjusted_mode.hdisplay >= 3840 &&

	    crtc_state->hw.adjusted_mode.vdisplay >= 2160)) {

		/* Get hblank early enable value required */

		hblank_early_prog = get_hblank_early_enable_config(encoder,

								   crtc_state);

		if (hblank_early_prog < 32) {

			val &= ~HBLANK_START_COUNT_MASK(pipe);

			val |= HBLANK_START_COUNT(pipe, HBLANK_START_COUNT_32);

		} else if (hblank_early_prog < 64) {

			val &= ~HBLANK_START_COUNT_MASK(pipe);

			val |= HBLANK_START_COUNT(pipe, HBLANK_START_COUNT_64);

		} else if (hblank_early_prog < 96) {

			val &= ~HBLANK_START_COUNT_MASK(pipe);

			val |= HBLANK_START_COUNT(pipe, HBLANK_START_COUNT_96);

		} else {

			val &= ~HBLANK_START_COUNT_MASK(pipe);

			val |= HBLANK_START_COUNT(pipe, HBLANK_START_COUNT_128);

		}



		/* Get samples room value required */

		samples_room = get_sample_room_req_config(crtc_state);

		if (samples_room < 3) {

			val &= ~NUMBER_SAMPLES_PER_LINE_MASK(pipe);

			val |= NUMBER_SAMPLES_PER_LINE(pipe, samples_room);

		} else {

			/* Program 0 i.e "All Samples available in buffer" */

			val &= ~NUMBER_SAMPLES_PER_LINE_MASK(pipe);

			val |= NUMBER_SAMPLES_PER_LINE(pipe, 0x0);

		}

	}



	intel_de_write(i915, AUD_CONFIG_BE, val);

}



#undef ROUNDING_FACTOR



static void hsw_audio_codec_enable(struct intel_encoder *encoder,

				   const struct intel_crtc_state *crtc_state,

				   const struct drm_connector_state *conn_state)
@@ -531,6 +668,10 @@ static void hsw_audio_codec_enable(struct intel_encoder *encoder, 


	mutex_lock(&dev_priv->av_mutex);



	/* Enable Audio WA for 4k DSC usecases */

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP))

		enable_audio_dsc_wa(encoder, crtc_state);



	/* Enable audio presence detect, invalidate ELD */

	tmp = intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD);

	tmp |= AUDIO_OUTPUT_ENABLE(cpu_transcoder);
@@ -1138,6 +1279,10 @@ static void i915_audio_component_unbind(struct device *i915_kdev, 
	drm_modeset_unlock_all(&dev_priv->drm);



	device_link_remove(hda_kdev, i915_kdev);



	if (dev_priv->audio_power_refcount)

		drm_err(&dev_priv->drm, "audio power refcount %d after unbind\n",

			dev_priv->audio_power_refcount);

}



static const struct component_ops i915_audio_component_bind_ops = {

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