Commit 3fd911b6 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2020-05-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-next 



drm-misc-next for 5.8:

UAPI Changes:

Cross-subsystem Changes:

 * MAINTAINERS: restore alphabetical order; update cirrus driver
 * Dcomuentation: document visionix, chronteli, ite vendor prefices; update
                  documentation for Chrontel CH7033, IT6505, IVO, BOE,
		  Panasonic, Chunghwa, AUO bindings; convert dw_mipi_dsi.txt
		  to YAML; remove todo item for drm_display_mode.hsync removal;

Core Changes:

 * drm: add devm_drm_dev_alloc() for managed allocations of drm_device;
        use DRM_MODESET_LOCK_ALL_*() in mode-object code; remove
        drm_display_mode.hsync; small cleanups of unused variables,
	compiler warnings and static functions
 * drm/client: dual-lincensing: GPL-2.0 or MIT
 * drm/mm: optimize tree searches in rb_hole_addr()

Driver Changes:

 * drm/{many}: use devm_drm_dev_alloc(); don't use drm_device.dev_private
 * drm/ast: don't double-assign to drm_crtc_funcs.set_config; drop
            drm_connector_register()
 * drm/bochs: drop drm_connector_register()
 * drm/bridge: add support for Chrontel ch7033; fix stack usage with
               old gccs; return error pointer in drm_panel_bridge_add()
 * drm/cirrus: Move to tiny
 * drm/dp_mst: don't use 2nd sideband tx slot; revert "Remove single tx
               msg restriction"
 * drm/lima: support runtime PM;
 * drm/meson: limit modes wrt chipset
 * drm/panel: add support for Visionox rm69299; fix clock on
              boe-tv101wum-n16; fix panel type for AUO G101EVN10;
	      add support for Ivo M133NFW4 R0; add support for BOE
	      NV133FHM-N61; add support for AUO G121EAN01.4, G156XTN01.0,
	      G190EAN01
 * drm/pl111: improve vexpress init; fix module auto-loading
 * drm/stm: read number of endpoints from device tree
 * drm/vboxvideo: use managed PCI functions; drop DRM_MTRR_WC
 * drm/vkms: fix use-after-free in vkms_gem_create(); enable cursor
             support by default
 * fbdev: use boolean values in several drivers
 * fbdev/controlfb: fix COMPILE_TEST
 * fbdev/w100fb: fix double-free bug

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20200507072503.GA10979@linux-uq9g
parents 370fb6b0 0ea2ea42

Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) 2019,2020 Lubomir Rintel <lkundrak@v3.sk>

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/bridge/chrontel,ch7033.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Chrontel CH7033 Video Encoder Device Tree Bindings



maintainers:

  - Lubomir Rintel <lkundrak@v3.sk>



properties:

  compatible:

    const: chrontel,ch7033



  reg:

    maxItems: 1

    description: I2C address of the device



  ports:

    type: object



    properties:

      port@0:

        type: object

        description: |

          Video port for RGB input.



      port@1:

        type: object

        description: |

          DVI port, should be connected to a node compatible with the

          dvi-connector binding.



    required:

      - port@0

      - port@1



required:

  - compatible

  - reg

  - ports



additionalProperties: false



examples:

  - |

    i2c {

        #address-cells = <1>;

        #size-cells = <0>;



        vga-dvi-encoder@76 {

            compatible = "chrontel,ch7033";

            reg = <0x76>;



            ports {

                #address-cells = <1>;

                #size-cells = <0>;



                port@0 {

                    reg = <0>;

                    endpoint {

                        remote-endpoint = <&lcd0_rgb_out>;

                    };

                };



                port@1 {

                    reg = <1>;

                    endpoint {

                        remote-endpoint = <&dvi_in>;

                    };

                };



            };

        };

    };

Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt

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Synopsys DesignWare MIPI DSI host controller

============================================



This document defines device tree properties for the Synopsys DesignWare MIPI

DSI host controller. It doesn't constitue a device tree binding specification

by itself but is meant to be referenced by platform-specific device tree

bindings.



When referenced from platform device tree bindings the properties defined in

this document are defined as follows. The platform device tree bindings are

responsible for defining whether each optional property is used or not.



- reg: Memory mapped base address and length of the DesignWare MIPI DSI

  host controller registers. (mandatory)



- clocks: References to all the clocks specified in the clock-names property

  as specified in [1]. (mandatory)



- clock-names:

  - "pclk" is the peripheral clock for either AHB and APB. (mandatory)

  - "px_clk" is the pixel clock for the DPI/RGB input. (optional)



- resets: References to all the resets specified in the reset-names property

  as specified in [2]. (optional)



- reset-names: string reset name, must be "apb" if used. (optional)



- panel or bridge node: see [3]. (mandatory)



[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

[2] Documentation/devicetree/bindings/reset/reset.txt

[3] Documentation/devicetree/bindings/display/mipi-dsi-bus.txt

Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/bridge/ite,it6505.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: ITE it6505 Device Tree Bindings



maintainers:

  - Allen Chen <allen.chen@ite.com.tw>



description: |

  The IT6505 is a high-performance DisplayPort 1.1a transmitter,

  fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications.

  The IT6505 supports color depth of up to 36 bits (12 bits/color)

  and ensures robust transmission of high-quality uncompressed video

  content, along with uncompressed and compressed digital audio content.



  Aside from the various video output formats supported, the IT6505

  also encodes and transmits up to 8 channels of I2S digital audio,

  with sampling rate up to 192kHz and sample size up to 24 bits.

  In addition, an S/PDIF input port takes in compressed audio of up to

  192kHz frame rate.



  Each IT6505 chip comes preprogrammed with an unique HDCP key,

  in compliance with the HDCP 1.3 standard so as to provide secure

  transmission of high-definition content. Users of the IT6505 need not

  purchase any HDCP keys or ROMs.



properties:

  compatible:

    const: ite,it6505



  ovdd-supply:

    maxItems: 1

    description: I/O voltage



  pwr18-supply:

    maxItems: 1

    description: core voltage



  interrupts:

    maxItems: 1

    description: interrupt specifier of INT pin



  reset-gpios:

    maxItems: 1

    description: gpio specifier of RESET pin



  extcon:

    maxItems: 1

    description: extcon specifier for the Power Delivery



  port:

    type: object

    description: A port node pointing to DPI host port node



required:

  - compatible

  - ovdd-supply

  - pwr18-supply

  - interrupts

  - reset-gpios

  - extcon



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>



    i2c {

        #address-cells = <1>;

        #size-cells = <0>;



        dp-bridge@5c {

            compatible = "ite,it6505";

            interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>;

            reg = <0x5c>;

            pinctrl-names = "default";

            pinctrl-0 = <&it6505_pins>;

            ovdd-supply = <&mt6358_vsim1_reg>;

            pwr18-supply = <&it6505_pp18_reg>;

            reset-gpios = <&pio 179 1>;

            extcon = <&usbc_extcon>;



            port {

                it6505_in: endpoint {

                    remote-endpoint = <&dpi_out>;

                };

            };

        };

    };

Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Synopsys DesignWare MIPI DSI host controller



maintainers:

  - Philippe CORNU <philippe.cornu@st.com>



description: |

  This document defines device tree properties for the Synopsys DesignWare MIPI

  DSI host controller. It doesn't constitue a device tree binding specification

  by itself but is meant to be referenced by platform-specific device tree

  bindings.



  When referenced from platform device tree bindings the properties defined in

  this document are defined as follows. The platform device tree bindings are

  responsible for defining whether each property is required or optional.



allOf:

  - $ref: ../dsi-controller.yaml#



properties:

  reg:

    maxItems: 1



  clocks:

    items:

      - description: Module clock

      - description: DSI bus clock for either AHB and APB

      - description: Pixel clock for the DPI/RGB input

    minItems: 2



  clock-names:

    items:

      - const: ref

      - const: pclk

      - const: px_clk

    minItems: 2



  resets:

    maxItems: 1



  reset-names:

    const: apb



  ports:

    type: object



    properties:

      port@0:

        type: object

        description: Input node to receive pixel data.

      port@1:

        type: object

        description: DSI output node to panel.



    required:

      - port@0

      - port@1



required:

  - clock-names

  - clocks

  - ports

  - reg

Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml

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@@ -42,6 +42,8 @@ properties: 
        # One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel

      - osddisplays,osd101t2587-53ts

        # Panasonic 10" WUXGA TFT LCD panel

      - panasonic,vvx10f004b00

        # Panasonic 10" WUXGA TFT LCD panel

      - panasonic,vvx10f034n00



  reg:

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