Commit 370fb6b0 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.8-2020-04-30' of git://people.freedesktop.org/~agd5f/linux into drm-next 

amd-drm-next-5.8-2020-04-30:

amdgpu:
- SR-IOV fixes
- SDMA fix for Navi
- VCN 2.5 DPG fixes
- Display fixes
- Display stuttering fixes for pageflip and cursor
- Add support for handling encrypted GPU memory
- Add UAPI for encrypted GPU memory
- Rework IB pool handling

amdkfd:
- Expose asic revision in topology
- Add UAPI for GWS (Global Wave Sync) resource management

UAPI:
- Add amdgpu UAPI for encrypted GPU memory
  Used by: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4401
- Add amdkfd UAPI for GWS (Global Wave Sync) resource management
  Thunk usage of KFD ioctl: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/blob/roc-2.8.0/src/queues.c#L840
  ROCr usage of Thunk API: https://github.com/RadeonOpenCompute/ROCR-Runtime/blob/roc-3.1.0/src/core/runtime/amd_gpu_agent.cpp#L597
  HCC code using ROCr API: https://github.com/RadeonOpenCompute/hcc/blob/98ee9f34945d3b5f572d7a4c15cbffa506487734/lib/hsa/mcwamp_hsa.cpp#L2161
  HIP code using HCC API: https://github.com/ROCm-Developer-Tools/HIP/blob/cf8589b8c8a40ddcc55fa3a51e23390a49824130/src/hip_module.cpp#L567



Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200430212951.3902-1-alexander.deucher@amd.com
parents 937eea29 b8020b03

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+9 −12
Original line number Diff line number Diff line
@@ -189,6 +189,8 @@ extern int sched_policy; 
static const int sched_policy = KFD_SCHED_POLICY_HWS;

#endif



extern int amdgpu_tmz;



#ifdef CONFIG_DRM_AMDGPU_SI

extern int amdgpu_si_support;

#endif
@@ -202,8 +204,6 @@ extern int amdgpu_cik_support; 
#define AMDGPU_WAIT_IDLE_TIMEOUT_IN_MS	        3000

#define AMDGPU_MAX_USEC_TIMEOUT			100000	/* 100 ms */

#define AMDGPU_FENCE_JIFFIES_TIMEOUT		(HZ / 2)

/* AMDGPU_IB_POOL_SIZE must be a power of 2 */

#define AMDGPU_IB_POOL_SIZE			16

#define AMDGPU_DEBUGFS_MAX_COMPONENTS		32

#define AMDGPUFB_CONN_LIMIT			4

#define AMDGPU_BIOS_NUM_SCRATCH			16
@@ -400,13 +400,6 @@ struct amdgpu_sa_bo { 
int amdgpu_fence_slab_init(void);

void amdgpu_fence_slab_fini(void);



enum amdgpu_ib_pool_type {

	AMDGPU_IB_POOL_NORMAL = 0,

	AMDGPU_IB_POOL_VM,

	AMDGPU_IB_POOL_DIRECT,



	AMDGPU_IB_POOL_MAX

};

/*

 * IRQS.

 */
@@ -864,7 +857,7 @@ struct amdgpu_device { 
	unsigned			num_rings;

	struct amdgpu_ring		*rings[AMDGPU_MAX_RINGS];

	bool				ib_pool_ready;

	struct amdgpu_sa_manager	ring_tmp_bo[AMDGPU_IB_POOL_MAX];

	struct amdgpu_sa_manager	ib_pools[AMDGPU_IB_POOL_MAX];

	struct amdgpu_sched		gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];



	/* interrupts */
@@ -1263,5 +1256,9 @@ _name##_show(struct device *dev, \ 
									\

static struct device_attribute pmu_attr_##_name = __ATTR_RO(_name)



#endif

static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)

{

       return adev->gmc.tmz_enabled;

}



#endif

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+7 −0
Original line number Diff line number Diff line
@@ -564,6 +564,13 @@ uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd) 
	return adev->gds.gws_size;

}



uint32_t amdgpu_amdkfd_get_asic_rev_id(struct kgd_dev *kgd)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;



	return adev->rev_id;

}



int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,

				uint32_t vmid, uint64_t gpu_addr,

				uint32_t *ib_cmd, uint32_t ib_len)

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

+1 −0
Original line number Diff line number Diff line
@@ -175,6 +175,7 @@ uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd); 
uint64_t amdgpu_amdkfd_get_unique_id(struct kgd_dev *kgd);

uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd);

uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd);

uint32_t amdgpu_amdkfd_get_asic_rev_id(struct kgd_dev *kgd);

uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src);



/* Read user wptr from a specified user address space with page fault

drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c

+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ static int amdgpu_benchmark_do_move(struct amdgpu_device *adev, unsigned size, 
	for (i = 0; i < n; i++) {

		struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;

		r = amdgpu_copy_buffer(ring, saddr, daddr, size, NULL, &fence,

				       false, false);

				       false, false, false);

		if (r)

			goto exit_do_move;

		r = dma_fence_wait(fence, false);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+2 −1
Original line number Diff line number Diff line
@@ -924,7 +924,8 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev, 


		ring = to_amdgpu_ring(entity->rq->sched);

		r =  amdgpu_ib_get(adev, vm, ring->funcs->parse_cs ?

				   chunk_ib->ib_bytes : 0, AMDGPU_IB_POOL_NORMAL, ib);

				   chunk_ib->ib_bytes : 0,

				   AMDGPU_IB_POOL_DELAYED, ib);

		if (r) {

			DRM_ERROR("Failed to get ib !\n");

			return r;

CRA Git | Maintained and supported by SUSTech CRA and CCSE