Commit a0184d71 authored by Alex Deucher's avatar Alex Deucher
Browse files

Revert "drm/amd/display: enable S/G for RAVEN chip"

This reverts commit 1c425915.

S/G display is not stable with the IOMMU enabled on some
platforms.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205523


Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 941a0a79
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+1 −1
Original line number Original line Diff line number Diff line
@@ -511,7 +511,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
	 * Also, don't allow GTT domain if the BO doens't have USWC falg set.
	 * Also, don't allow GTT domain if the BO doens't have USWC falg set.
	 */
	 */
	if (adev->asic_type >= CHIP_CARRIZO &&
	if (adev->asic_type >= CHIP_CARRIZO &&
	    adev->asic_type <= CHIP_RAVEN &&
	    adev->asic_type < CHIP_RAVEN &&
	    (adev->flags & AMD_IS_APU) &&
	    (adev->flags & AMD_IS_APU) &&
	    (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
	    (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
	    amdgpu_bo_support_uswc(bo_flags) &&
	    amdgpu_bo_support_uswc(bo_flags) &&
+1 −1
Original line number Original line Diff line number Diff line
@@ -688,7 +688,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
	 */
	 */
	if (adev->flags & AMD_IS_APU &&
	if (adev->flags & AMD_IS_APU &&
	    adev->asic_type >= CHIP_CARRIZO &&
	    adev->asic_type >= CHIP_CARRIZO &&
	    adev->asic_type <= CHIP_RAVEN)
	    adev->asic_type < CHIP_RAVEN)
		init_data.flags.gpu_vm_support = true;
		init_data.flags.gpu_vm_support = true;


	if (amdgpu_dc_feature_mask & DC_FBC_MASK)
	if (amdgpu_dc_feature_mask & DC_FBC_MASK)