Commit 9b5bc8dc authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86, apic: remove IRQ_DEST_MODE / IRQ_DELIVERY_MODE 



Remove the wrapper macros IRQ_DEST_MODE and IRQ_DELIVERY_MODE.

The typical 32-bit and the 64-bit build all dereference via the genapic,
so it's pointless to hide that indirection via these ugly macros.

Furthermore, it also obscures subarchitecture details.

So replace it with apic->irq_dest_mode / etc. accesses.

Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent f8987a10

arch/x86/include/asm/bigsmp/apic.h

+2 −2
Original line number Diff line number Diff line
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void) 
#undef APIC_DEST_LOGICAL

#define APIC_DEST_LOGICAL	0

#define APIC_DFR_VALUE		(APIC_DFR_FLAT)

#define IRQ_DELIVERY_MODE	(dest_Fixed)

#define IRQ_DEST_MODE		(0)    /* phys delivery to target proc */

#define BIGSMP_IRQ_DELIVERY_MODE (dest_Fixed)

#define BIGSMP_IRQ_DEST_MODE	(0)    /* phys delivery to target proc */

#define NO_BALANCE_IRQ		(0)



static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)

arch/x86/include/asm/es7000/apic.h

+2 −2
Original line number Diff line number Diff line
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void) 
#define NO_BALANCE_IRQ_CLUSTER		(1)



#define APIC_DFR_VALUE		(APIC_DFR_FLAT)

#define IRQ_DELIVERY_MODE	(dest_Fixed)

#define IRQ_DEST_MODE		(0)    /* phys delivery to target procs */

#define ES7000_IRQ_DELIVERY_MODE (dest_Fixed)

#define ES7000_IRQ_DEST_MODE	(0)    /* phys delivery to target procs */

#define NO_BALANCE_IRQ		(0)

#undef  APIC_DEST_LOGICAL

#define APIC_DEST_LOGICAL	0x0

arch/x86/include/asm/mach-default/mach_apic.h

+2 −3
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@ static inline const struct cpumask *target_cpus(void) 


#ifdef CONFIG_X86_64

#include <asm/genapic.h>

#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)

#define IRQ_DEST_MODE (apic->irq_dest_mode)

#define TARGET_CPUS	  (apic->target_cpus())

#define init_apic_ldr (apic->init_apic_ldr)
@@ -35,8 +34,8 @@ static inline const struct cpumask *target_cpus(void) 
#define wakeup_secondary_cpu (apic->wakeup_cpu)

extern void setup_apic_routing(void);

#else

#define IRQ_DELIVERY_MODE dest_LowestPrio

#define IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */

#define DEFAULT_IRQ_DELIVERY_MODE dest_LowestPrio

#define DEFAULT_IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */

#define TARGET_CPUS (target_cpus())

#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init

/*

arch/x86/include/asm/mach-generic/mach_apic.h

+0 −2
Original line number Diff line number Diff line
@@ -5,8 +5,6 @@ 


#define esr_disable (apic->ESR_DISABLE)

#define NO_BALANCE_IRQ (apic->no_balance_irq)

#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)

#define IRQ_DEST_MODE (apic->irq_dest_mode)

#undef APIC_DEST_LOGICAL

#define APIC_DEST_LOGICAL (apic->apic_destination_logical)

#define TARGET_CPUS	  (apic->target_cpus())

arch/x86/include/asm/numaq/apic.h

+2 −2
Original line number Diff line number Diff line
@@ -15,8 +15,8 @@ static inline const cpumask_t *target_cpus(void) 
#define NO_BALANCE_IRQ (1)

#define esr_disable (1)



#define IRQ_DELIVERY_MODE dest_LowestPrio

#define IRQ_DEST_MODE 0     /* physical delivery on LOCAL quad */

#define NUMAQ_IRQ_DELIVERY_MODE dest_LowestPrio

#define NUMAQ_IRQ_DEST_MODE 0     /* physical delivery on LOCAL quad */

 

static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)

{

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