Commit f8987a10 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86, genapic: rename int_delivery_mode, et. al. 



int_delivery_mode is supposed to mean 'interrupt delivery mode', but
it's quite a misnomer as 'int' we usually think of as an integer type ...

The standard naming for such attributes is 'irq' - so rename the following
fields and macros:

 int_delivery_mode => irq_delivery_mode
 INT_DELIVERY_MODE => IRQ_DELIVERY_MODE
 int_dest_mode     => irq_dest_mode
 INT_DEST_MODE     => IRQ_DEST_MODE

Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 7ed248da

arch/x86/include/asm/bigsmp/apic.h

+2 −2
Original line number Diff line number Diff line
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void) 
#undef APIC_DEST_LOGICAL

#define APIC_DEST_LOGICAL	0

#define APIC_DFR_VALUE		(APIC_DFR_FLAT)

#define INT_DELIVERY_MODE	(dest_Fixed)

#define INT_DEST_MODE		(0)    /* phys delivery to target proc */

#define IRQ_DELIVERY_MODE	(dest_Fixed)

#define IRQ_DEST_MODE		(0)    /* phys delivery to target proc */

#define NO_BALANCE_IRQ		(0)



static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)

arch/x86/include/asm/es7000/apic.h

+2 −2
Original line number Diff line number Diff line
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void) 
#define NO_BALANCE_IRQ_CLUSTER		(1)



#define APIC_DFR_VALUE		(APIC_DFR_FLAT)

#define INT_DELIVERY_MODE	(dest_Fixed)

#define INT_DEST_MODE		(0)    /* phys delivery to target procs */

#define IRQ_DELIVERY_MODE	(dest_Fixed)

#define IRQ_DEST_MODE		(0)    /* phys delivery to target procs */

#define NO_BALANCE_IRQ		(0)

#undef  APIC_DEST_LOGICAL

#define APIC_DEST_LOGICAL	0x0

arch/x86/include/asm/genapic.h

+2 −2
Original line number Diff line number Diff line
@@ -23,8 +23,8 @@ struct genapic { 
	int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);

	int (*apic_id_registered)(void);



	u32 int_delivery_mode;

	u32 int_dest_mode;

	u32 irq_delivery_mode;

	u32 irq_dest_mode;



	const struct cpumask *(*target_cpus)(void);

arch/x86/include/asm/mach-default/mach_apic.h

+4 −4
Original line number Diff line number Diff line
@@ -22,8 +22,8 @@ static inline const struct cpumask *target_cpus(void) 


#ifdef CONFIG_X86_64

#include <asm/genapic.h>

#define INT_DELIVERY_MODE (apic->int_delivery_mode)

#define INT_DEST_MODE (apic->int_dest_mode)

#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)

#define IRQ_DEST_MODE (apic->irq_dest_mode)

#define TARGET_CPUS	  (apic->target_cpus())

#define init_apic_ldr (apic->init_apic_ldr)

#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
@@ -35,8 +35,8 @@ static inline const struct cpumask *target_cpus(void) 
#define wakeup_secondary_cpu (apic->wakeup_cpu)

extern void setup_apic_routing(void);

#else

#define INT_DELIVERY_MODE dest_LowestPrio

#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */

#define IRQ_DELIVERY_MODE dest_LowestPrio

#define IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */

#define TARGET_CPUS (target_cpus())

#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init

/*

arch/x86/include/asm/mach-generic/mach_apic.h

+2 −2
Original line number Diff line number Diff line
@@ -5,8 +5,8 @@ 


#define esr_disable (apic->ESR_DISABLE)

#define NO_BALANCE_IRQ (apic->no_balance_irq)

#define INT_DELIVERY_MODE (apic->int_delivery_mode)

#define INT_DEST_MODE (apic->int_dest_mode)

#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)

#define IRQ_DEST_MODE (apic->irq_dest_mode)

#undef APIC_DEST_LOGICAL

#define APIC_DEST_LOGICAL (apic->apic_destination_logical)

#define TARGET_CPUS	  (apic->target_cpus())

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