Commit 9a7b711e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v3.20-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt 

Merge "ARM: mediatek: DT changes for v3.20 (round 1)" from Matthias Brugger:

This adds support for the mediatek sysirq and the uarts for the following SoCs:
- mt8135
- mt8127
- mt6598

For mt6592 only the sysirq support was added.

* tag 'v3.20-next-dts' of https://github.com/mbgg/linux-mediatek

:
  ARM: mediatek: dts: Add uart to Aquaris5
  ARM: mediatek: dts: Add uart to mt6589
  dt-bindings: add mt6592 compatible string for mediatek sysirq
  ARM: mediatek: Add sysirq device node to mt6592 dtsi
  ARM: mediatek: dts: Add UART dts for MT8127 and MT8135 boards
  DTS: serial: Add bindings document for the Mediatek UARTs
  ARM: mediatek: add UART dts for mt8127 and mt8135
  ARM: mediatek: Add sysirq in mt6589/mt8135/mt8127 dtsi

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d708da24 3aa2e281

Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ Required properties: 
- compatible: should be one of:

	"mediatek,mt8135-sysirq"

	"mediatek,mt8127-sysirq"

	"mediatek,mt6592-sysirq"

	"mediatek,mt6589-sysirq"

	"mediatek,mt6582-sysirq"

	"mediatek,mt6577-sysirq"

Documentation/devicetree/bindings/serial/mtk-uart.txt

+2 −0
Original line number Diff line number Diff line
@@ -2,6 +2,8 @@ 


Required properties:

- compatible should contain:

  * "mediatek,mt8135-uart" for MT8135 compatible UARTS

  * "mediatek,mt8127-uart" for MT8127 compatible UARTS

  * "mediatek,mt6589-uart" for MT6589 compatible UARTS

  * "mediatek,mt6582-uart" for MT6582 compatible UARTS

  * "mediatek,mt6577-uart" for all compatible UARTS (MT6589, MT6582, MT6577)

arch/arm/boot/dts/mt6589-aquaris5.dts

+11 −1
Original line number Diff line number Diff line
@@ -21,10 +21,20 @@ 
	compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589";



	chosen {

		bootargs = "earlyprintk";

		bootargs = "console=ttyS0,921600n8 earlyprintk";

		stdout-path = &uart0;

	};



	memory {

		reg = <0x80000000 0x40000000>;

	};



};



&uart0 {

	status = "okay";

};



&uart3 {

	status = "okay";

};

arch/arm/boot/dts/mt6589.dtsi

+50 −2
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 


/ {

	compatible = "mediatek,mt6589";

	interrupt-parent = <&gic>;

	interrupt-parent = <&sysirq>;



	cpus {

		#address-cells = <1>;
@@ -65,6 +65,12 @@ 
			clock-frequency = <32000>;

			#clock-cells = <0>;

		};



		uart_clk: dummy26m {

			compatible = "fixed-clock";

			clock-frequency = <26000000>;

			#clock-cells = <0>;

		};

	};



	soc {
@@ -76,19 +82,61 @@ 
		timer: timer@10008000 {

			compatible = "mediatek,mt6577-timer";

			reg = <0x10008000 0x80>;

			interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>;

			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&system_clk>, <&rtc_clk>;

			clock-names = "system-clk", "rtc-clk";

		};



		sysirq: interrupt-controller@10200100 {

			compatible = "mediatek,mt6589-sysirq",

				     "mediatek,mt6577-sysirq";

			interrupt-controller;

			#interrupt-cells = <3>;

			interrupt-parent = <&gic>;

			reg = <0x10200100 0x1c>;

		};



		gic: interrupt-controller@10211000 {

			compatible = "arm,cortex-a7-gic";

			interrupt-controller;

			#interrupt-cells = <3>;

			interrupt-parent = <&gic>;

			reg = <0x10211000 0x1000>,

			      <0x10212000 0x1000>,

			      <0x10214000 0x2000>,

			      <0x10216000 0x2000>;

		};



		uart0: serial@11006000 {

			compatible = "mediatek,mt6577-uart";

			reg = <0x11006000 0x400>;

			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			status = "disabled";

		};



		uart1: serial@11007000 {

			compatible = "mediatek,mt6577-uart";

			reg = <0x11007000 0x400>;

			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			status = "disabled";

		};



		uart2: serial@11008000 {

			compatible = "mediatek,mt6577-uart";

			reg = <0x11008000 0x400>;

			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			status = "disabled";

		};



		uart3: serial@11009000 {

			compatible = "mediatek,mt6577-uart";

			reg = <0x11009000 0x400>;

			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;

			clocks = <&uart_clk>;

			status = "disabled";

		};

	};

};

arch/arm/boot/dts/mt6592.dtsi

+11 −4
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 


/ {

	compatible = "mediatek,mt6592";

	interrupt-parent = <&gic>;

	interrupt-parent = <&sysirq>;



	cpus {

		#address-cells = <1>;
@@ -81,18 +81,25 @@ 
	timer: timer@10008000 {

		compatible = "mediatek,mt6577-timer";

		reg = <0x10008000 0x80>;

		interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&system_clk>, <&rtc_clk>;

		clock-names = "system-clk", "rtc-clk";

	};



	sysirq: interrupt-controller@10200220 {

		compatible = "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq";

		interrupt-controller;

		#interrupt-cells = <3>;

		interrupt-parent = <&gic>;

		reg = <0x10200220 0x1c>;

	};



	gic: interrupt-controller@10211000 {

		compatible = "arm,cortex-a7-gic";

		interrupt-controller;

		#interrupt-cells = <3>;

		interrupt-parent = <&gic>;

		reg = <0x10211000 0x1000>,

		      <0x10212000 0x1000>;

	};



};

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