Unverified Commit 96940819 authored by Maxime Ripard's avatar Maxime Ripard
Browse files

ARM: dts: sun9i: Make sure the USB PHY resources are in the same order 



While this is functional, it's a best practice to always have the clocks
and reset lines in order, in case we ever need to have compatibility code.

Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
parent c1cc29f2

arch/arm/boot/dts/sun9i-a80.dtsi

+16 −16
Original line number Diff line number Diff line
@@ -387,16 +387,16 @@ 
		usbphy2: phy@a01800 {

			compatible = "allwinner,sun9i-a80-usb-phy";

			reg = <0x00a01800 0x4>;

			clocks = <&usb_clocks CLK_USB1_HSIC>,

			clocks = <&usb_clocks CLK_USB1_PHY>,

				 <&usb_clocks CLK_USB_HSIC>,

				 <&usb_clocks CLK_USB1_PHY>;

			clock-names = "hsic_480M",

				 <&usb_clocks CLK_USB1_HSIC>;

			clock-names = "phy",

				      "hsic_12M",

				      "phy";

			resets = <&usb_clocks RST_USB1_HSIC>,

				 <&usb_clocks RST_USB1_PHY>;

			reset-names = "hsic",

				      "phy";

				      "hsic_480M";

			resets = <&usb_clocks RST_USB1_PHY>,

				 <&usb_clocks RST_USB1_HSIC>;

			reset-names = "phy",

				      "hsic";

			status = "disabled";

			#phy-cells = <0>;

			/* usb1 is always used with HSIC */
@@ -429,16 +429,16 @@ 
		usbphy3: phy@a02800 {

			compatible = "allwinner,sun9i-a80-usb-phy";

			reg = <0x00a02800 0x4>;

			clocks = <&usb_clocks CLK_USB2_HSIC>,

			clocks = <&usb_clocks CLK_USB2_PHY>,

				 <&usb_clocks CLK_USB_HSIC>,

				 <&usb_clocks CLK_USB2_PHY>;

			clock-names = "hsic_480M",

				 <&usb_clocks CLK_USB2_HSIC>;

			clock-names = "phy",

				      "hsic_12M",

				      "phy";

			resets = <&usb_clocks RST_USB2_HSIC>,

				 <&usb_clocks RST_USB2_PHY>;

			reset-names = "hsic",

				      "phy";

				      "hsic_480M";

			resets = <&usb_clocks RST_USB2_PHY>,

				 <&usb_clocks RST_USB2_HSIC>;

			reset-names = "phy",

				      "hsic";

			status = "disabled";

			#phy-cells = <0>;

		};

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