Commit 9566b675 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
Browse files

drm/amd/display: remove safe_to_lower flag from dc, use 2 functions instead 



This is done to keep things more readable, avoids a true/false flag
in dc interface layer.

Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 24f7dd7e

drivers/gpu/drm/amd/display/dc/core/dc.c

+4 −4
Original line number Diff line number Diff line
@@ -941,7 +941,7 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c 
	if (!dcb->funcs->is_accelerated_mode(dcb))

		dc->hwss.enable_accelerated_mode(dc, context);



	dc->hwss.set_bandwidth(dc, context, false);

	dc->hwss.prepare_bandwidth(dc, context);



	/* re-program planes for existing stream, in case we need to

	 * free up plane resource for later use
@@ -1010,7 +1010,7 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c 
	dc_enable_stereo(dc, context, dc_streams, context->stream_count);



	/* pplib is notified if disp_num changed */

	dc->hwss.set_bandwidth(dc, context, true);

	dc->hwss.optimize_bandwidth(dc, context);



	dc_release_state(dc->current_state);
@@ -1059,7 +1059,7 @@ bool dc_post_update_surfaces_to_stream(struct dc *dc) 


	dc->optimized_required = false;



	dc->hwss.set_bandwidth(dc, context, true);

	dc->hwss.optimize_bandwidth(dc, context);

	return true;

}
@@ -1479,7 +1479,7 @@ static void commit_planes_for_stream(struct dc *dc, 
	struct pipe_ctx *top_pipe_to_program = NULL;



	if (update_type == UPDATE_TYPE_FULL) {

		dc->hwss.set_bandwidth(dc, context, false);

		dc->hwss.prepare_bandwidth(dc, context);

		context_clock_trace(dc, context);

	}

drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c

+5 −10
Original line number Diff line number Diff line
@@ -105,22 +105,16 @@ bool dce100_enable_display_power_gating( 
		return false;

}



void dce100_set_bandwidth(

void dce100_prepare_bandwidth(

		struct dc *dc,

		struct dc_state *context,

		bool decrease_allowed)

		struct dc_state *context)

{

	int dispclk_khz = context->bw.dce.dispclk_khz;



	context->bw.dce.dispclk_khz = context->bw.dce.dispclk_khz * 115 / 100;



	dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool);



	dc->res_pool->dccg->funcs->update_clocks(

			dc->res_pool->dccg,

			context,

			decrease_allowed);

	context->bw.dce.dispclk_khz = dispclk_khz;

			false);

}



/**************************************************************************/
@@ -130,6 +124,7 @@ void dce100_hw_sequencer_construct(struct dc *dc) 
	dce110_hw_sequencer_construct(dc);



	dc->hwss.enable_display_power_gating = dce100_enable_display_power_gating;

	dc->hwss.set_bandwidth = dce100_set_bandwidth;

	dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth;

	dc->hwss.optimize_bandwidth = dce100_prepare_bandwidth;

}

drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h

+2 −3
Original line number Diff line number Diff line
@@ -33,10 +33,9 @@ struct dc_state; 


void dce100_hw_sequencer_construct(struct dc *dc);



void dce100_set_bandwidth(

void dce100_prepare_bandwidth(

		struct dc *dc,

		struct dc_state *context,

		bool decrease_allowed);

		struct dc_state *context);



bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,

					struct dc_bios *dcb,

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+21 −9
Original line number Diff line number Diff line
@@ -2352,22 +2352,33 @@ static void init_hw(struct dc *dc) 


}



void dce110_set_bandwidth(



void dce110_prepare_bandwidth(

		struct dc *dc,

		struct dc_state *context,

		bool decrease_allowed)

		struct dc_state *context)

{

	struct dccg *dccg = dc->res_pool->dccg;



	if (decrease_allowed)

		dce110_set_displaymarks(dc, context);

	else

	dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool);



	dccg->funcs->update_clocks(

			dccg,

			context,

			decrease_allowed);

			false);

}



void dce110_optimize_bandwidth(

		struct dc *dc,

		struct dc_state *context)

{

	struct dccg *dccg = dc->res_pool->dccg;



	dce110_set_displaymarks(dc, context);



	dccg->funcs->update_clocks(

			dccg,

			context,

			true);

}



static void dce110_program_front_end_for_pipe(
@@ -2667,7 +2678,8 @@ static const struct hw_sequencer_funcs dce110_funcs = { 
	.enable_display_power_gating = dce110_enable_display_power_gating,

	.disable_plane = dce110_power_down_fe,

	.pipe_control_lock = dce_pipe_control_lock,

	.set_bandwidth = dce110_set_bandwidth,

	.prepare_bandwidth = dce110_prepare_bandwidth,

	.optimize_bandwidth = dce110_optimize_bandwidth,

	.set_drr = set_drr,

	.get_position = get_position,

	.set_static_screen_control = set_static_screen_control,

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h

+6 −3
Original line number Diff line number Diff line
@@ -63,10 +63,13 @@ void dce110_set_safe_displaymarks( 
		struct resource_context *res_ctx,

		const struct resource_pool *pool);



void dce110_set_bandwidth(

void dce110_prepare_bandwidth(

		struct dc *dc,

		struct dc_state *context,

		bool decrease_allowed);

		struct dc_state *context);



void dce110_optimize_bandwidth(

		struct dc *dc,

		struct dc_state *context);



void dp_receiver_power_ctrl(struct dc_link *link, bool on);

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