Commit 8cd117e7 authored by Jacky Bai's avatar Jacky Bai Committed by Stephen Boyd
Browse files

clk: imx: keep uart clock on during system boot 



Keep uart clocks enabled when earlyprintk or
earlycon is active.

Signed-off-by: default avatarJacky Bai <ping.bai@nxp.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent b4a4cb5a

drivers/clk/imx/clk-imx6sll.c

+16 −0
Original line number Diff line number Diff line
@@ -76,6 +76,20 @@ static u32 share_count_ssi1; 
static u32 share_count_ssi2;

static u32 share_count_ssi3;



static struct clk ** const uart_clks[] __initconst = {

	&clks[IMX6SLL_CLK_UART1_IPG],

	&clks[IMX6SLL_CLK_UART1_SERIAL],

	&clks[IMX6SLL_CLK_UART2_IPG],

	&clks[IMX6SLL_CLK_UART2_SERIAL],

	&clks[IMX6SLL_CLK_UART3_IPG],

	&clks[IMX6SLL_CLK_UART3_SERIAL],

	&clks[IMX6SLL_CLK_UART4_IPG],

	&clks[IMX6SLL_CLK_UART4_SERIAL],

	&clks[IMX6SLL_CLK_UART5_IPG],

	&clks[IMX6SLL_CLK_UART5_SERIAL],

	NULL

};



static void __init imx6sll_clocks_init(struct device_node *ccm_node)

{

	struct device_node *np;
@@ -334,6 +348,8 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node) 
	clk_data.clk_num = ARRAY_SIZE(clks);

	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);



	imx_register_uart_clocks(uart_clks);



	/* Lower the AHB clock rate before changing the clock source. */

	clk_set_rate(clks[IMX6SLL_CLK_AHB], 99000000);

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