drm/amd/powerplay: add helper function to get voltage id in votage table (8bea2527) · Commits · 戴 / test

drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c

+21 −0

Original line number	Diff line number	Diff line
		@@ -443,6 +443,27 @@ uint8_t phm_get_voltage_index(
		return i - 1;
		}

		uint8_t phm_get_voltage_id(pp_atomctrl_voltage_table *voltage_table,
		uint32_t voltage)
		{
		uint8_t count = (uint8_t) (voltage_table->count);
		uint8_t i = 0;

		PP_ASSERT_WITH_CODE((NULL != voltage_table),
		"Voltage Table empty.", return 0;);
		PP_ASSERT_WITH_CODE((0 != count),
		"Voltage Table empty.", return 0;);

		for (i = 0; i < count; i++) {
		/* find first voltage bigger than requested */
		if (voltage_table->entries[i].value >= voltage)
		return i;
		}

		/* voltage is bigger than max voltage in the table */
		return i - 1;
		}

		uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, uint16_t vddci)
		{
		uint32_t i;

+2 −2

Original line number	Diff line number	Diff line
		@@ -685,6 +685,8 @@ extern void phm_trim_voltage_table_to_fit_state_table(uint32_t max_vol_steps, st
		extern int phm_reset_single_dpm_table(void *table, uint32_t count, int max);
		extern void phm_setup_pcie_table_entry(void *table, uint32_t index, uint32_t pcie_gen, uint32_t pcie_lanes);
		extern int32_t phm_get_dpm_level_enable_mask_value(void *table);
		extern uint8_t phm_get_voltage_id(struct pp_atomctrl_voltage_table *voltage_table,
		uint32_t voltage);
		extern uint8_t phm_get_voltage_index(struct phm_ppt_v1_voltage_lookup_table *lookup_table, uint16_t voltage);
		extern uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, uint16_t vddci);
		extern int phm_find_boot_level(void table, uint32_t value, uint32_t boot_level);
		@@ -709,8 +711,6 @@ extern void phm_apply_dal_min_voltage_request(struct pp_hwmgr *hwmgr);
		PHM_FIELD_SHIFT(reg, field))




		/* Operations on named fields. */

		#define PHM_READ_FIELD(device, reg, field) \