Unverified Commit 8b2a3787 authored by Jagan Teki's avatar Jagan Teki Committed by Maxime Ripard
Browse files

dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro 



Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent.

Include the macro on dt-bindings so-that the same can be used
while defining CCU clock phandles.

Signed-off-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent 5de39aca

drivers/clk/sunxi-ng/ccu-sun50i-a64.h

+3 −1
Original line number Diff line number Diff line
@@ -27,7 +27,9 @@ 
#define CLK_PLL_AUDIO_2X		4

#define CLK_PLL_AUDIO_4X		5

#define CLK_PLL_AUDIO_8X		6

#define CLK_PLL_VIDEO0			7



/* PLL_VIDEO0 exported for HDMI PHY */



#define CLK_PLL_VIDEO0_2X		8

#define CLK_PLL_VE			9

#define CLK_PLL_DDR0			10

include/dt-bindings/clock/sun50i-a64-ccu.h

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ 
#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_

#define _DT_BINDINGS_CLK_SUN50I_A64_H_



#define CLK_PLL_VIDEO0		7

#define CLK_PLL_PERIPH0		11



#define CLK_BUS_MIPI_DSI	28

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