Commit 891f30bf authored by Anson Huang's avatar Anson Huang Committed by Stephen Boyd
Browse files

clk: imx6sx: add mmdc1 ipg clock



i.MX6SX has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent acc4f98d
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+1 −0
Original line number Diff line number Diff line
@@ -431,6 +431,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
	clks[IMX6SX_CLK_MLB]          = imx_clk_gate2("mlb",           "ahb",               base + 0x74, 18);
	clks[IMX6SX_CLK_MMDC_P0_FAST] = imx_clk_gate2_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL);
	clks[IMX6SX_CLK_MMDC_P0_IPG]  = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL);
	clks[IMX6SX_CLK_MMDC_P1_IPG]  = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26);
	clks[IMX6SX_CLK_OCRAM]        = imx_clk_gate2_flags("ocram", "ocram_podf", base + 0x74, 28, CLK_IS_CRITICAL);

	/* CCGR4 */
+2 −1
Original line number Diff line number Diff line
@@ -279,6 +279,7 @@
#define IMX6SX_CLK_LVDS2_OUT		266
#define IMX6SX_CLK_LVDS2_IN		267
#define IMX6SX_CLK_ANACLK2		268
#define IMX6SX_CLK_CLK_END		269
#define IMX6SX_CLK_MMDC_P1_IPG		269
#define IMX6SX_CLK_CLK_END		270

#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */