Commit 8761f3b3 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-3.14-dt-2' of... 

Merge tag 'tegra-for-3.14-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

From Stephen Warren:
ARM: tegra: second set of device tree changes

This branch contains changes to Tegra's device tree that came in after
I sent the previous pull-request/tag tegra-for-3.14-dt. Changes are:

* Set up aliases for RTCs, so that the correct RTC is chosen to
  initialize the system date/time.
* Venice2 pinctrl and regulator configuration.
* Built-in panel enablement for Harmony, Cardhu, Dalmore.
* HDMI enablement for Dalmore.
* USB2 port enablement for Beaver.
* Keyboard and power key enablement for Venice2.

* tag 'tegra-for-3.14-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  ARM: tegra: Enable power key on Venice2
  ARM: tegra: Enable Venice2 keyboard
  ARM: tegra: enable USB2 on Tegra30 Beaver
  ARM: tegra: modify Tegra30 USB2 default phy_type to UTMI
  ARM: tegra: Enable HDMI support on Dalmore
  ARM: tegra: Enable DSI support on Dalmore
  ARM: tegra: Add Tegra114 gr3d support
  ARM: tegra: Add Tegra114 gr2d support
  ARM: tegra: Add Tegra114 DSI support
  ARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree
  ARM: tegra: Add MIPI calibration DT entries for Tegra114
  ARM: tegra: Enable LVDS on Cardhu
  ARM: tegra: Enable LVDS on Harmony
  ARM: tegra: set up /aliases for RTCs on Venice2
  ARM: tegra: add ams AS3722 device to Venice2 DT
  ARM: tegra: fix missing pincontrol configuration for Venice2
  ARM: tegra: set up /aliases entries for RTCs

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 5aceaab3 3f748d44

arch/arm/boot/dts/tegra114-dalmore.dts

+52 −12
Original line number Diff line number Diff line
@@ -7,10 +7,41 @@ 
	model = "NVIDIA Tegra114 Dalmore evaluation board";

	compatible = "nvidia,dalmore", "nvidia,tegra114";



	aliases {

		rtc0 = "/i2c@7000d000/tps65913@58";

		rtc1 = "/rtc@7000e000";

	};



	memory {

		reg = <0x80000000 0x40000000>;

	};



	host1x@50000000 {

		hdmi@54280000 {

			status = "okay";



			vdd-supply = <&vdd_hdmi_reg>;

			pll-supply = <&palmas_smps3_reg>;



			nvidia,ddc-i2c-bus = <&hdmi_ddc>;

			nvidia,hpd-gpio =

				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;

		};



		dsi@54300000 {

			status = "okay";



			panel@0 {

				compatible = "panasonic,vvx10f004b00",

					     "simple-panel";

				reg = <0>;



				power-supply = <&avdd_lcd_reg>;

				backlight = <&backlight>;

			};

		};

	};



	pinmux@70000868 {

		pinctrl-names = "default";

		pinctrl-0 = <&state_default>;
@@ -718,6 +749,10 @@ 
		status = "okay";

	};



	pwm@7000a000 {

		status = "okay";

	};



	i2c@7000c000 {

		status = "okay";

		clock-frequency = <100000>;
@@ -749,6 +784,10 @@ 
		};

	};



	hdmi_ddc: i2c@7000c700 {

		status = "okay";

	};



	i2c@7000d000 {

		status = "okay";

		clock-frequency = <400000>;
@@ -806,7 +845,7 @@ 
					regulator-boot-on;

				};



				fet1 {

				vdd_bl_reg: fet1 {

					regulator-name = "vdd-lcd-bl";

				};
@@ -814,7 +853,7 @@ 
					regulator-name = "vdd-modem-3v3";

				};



				fet4 {

				avdd_lcd_reg: fet4 {

					regulator-name = "avdd-lcd";

				};
@@ -1084,6 +1123,17 @@ 
		vbus-supply = <&usb3_vbus_reg>;

	};



	backlight: backlight {

		compatible = "pwm-backlight";



		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;

		power-supply = <&vdd_bl_reg>;

		pwms = <&pwm 1 1000000>;



		brightness-levels = <0 4 8 16 32 64 128 255>;

		default-brightness-level = <6>;

	};



	clocks {

		compatible = "simple-bus";

		#address-cells = <1>;
@@ -1150,16 +1200,6 @@ 
			gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;

		};



		lcd_bl_en_reg: regulator@2 {

			compatible = "regulator-fixed";

			reg = <2>;

			regulator-name = "lcd_bl_en";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

			enable-active-high;

			gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;

		};



		usb1_vbus_reg: regulator@3 {

			compatible = "regulator-fixed";

			reg = <3>;

arch/arm/boot/dts/tegra114.dtsi

+113 −0
Original line number Diff line number Diff line
@@ -16,6 +16,112 @@ 
		serial3 = &uartd;

	};



	host1x@50000000 {

		compatible = "nvidia,tegra114-host1x", "simple-bus";

		reg = <0x50000000 0x00028000>;

		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */

			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */

		clocks = <&tegra_car TEGRA114_CLK_HOST1X>;

		resets = <&tegra_car 28>;

		reset-names = "host1x";



		#address-cells = <1>;

		#size-cells = <1>;



		ranges = <0x54000000 0x54000000 0x01000000>;



		gr2d@54140000 {

			compatible = "nvidia,tegra114-gr2d", "nvidia,tegra20-gr2d";

			reg = <0x54140000 0x00040000>;

			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&tegra_car TEGRA114_CLK_GR2D>;

			resets = <&tegra_car 21>;

			reset-names = "2d";

		};



		gr3d@54180000 {

			compatible = "nvidia,tegra114-gr3d", "nvidia,tegra20-gr3d";

			reg = <0x54180000 0x00040000>;

			clocks = <&tegra_car TEGRA114_CLK_GR3D>;

			resets = <&tegra_car 24>;

			reset-names = "3d";

		};



		dc@54200000 {

			compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";

			reg = <0x54200000 0x00040000>;

			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&tegra_car TEGRA114_CLK_DISP1>,

				 <&tegra_car TEGRA114_CLK_PLL_P>;

			clock-names = "dc", "parent";

			resets = <&tegra_car 27>;

			reset-names = "dc";



			rgb {

				status = "disabled";

			};

		};



		dc@54240000 {

			compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";

			reg = <0x54240000 0x00040000>;

			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&tegra_car TEGRA114_CLK_DISP2>,

				 <&tegra_car TEGRA114_CLK_PLL_P>;

			clock-names = "dc", "parent";

			resets = <&tegra_car 26>;

			reset-names = "dc";



			rgb {

				status = "disabled";

			};

		};



		hdmi@54280000 {

			compatible = "nvidia,tegra114-hdmi";

			reg = <0x54280000 0x00040000>;

			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&tegra_car TEGRA114_CLK_HDMI>,

				 <&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;

			clock-names = "hdmi", "parent";

			resets = <&tegra_car 51>;

			reset-names = "hdmi";

			status = "disabled";

		};



		dsi@54300000 {

			compatible = "nvidia,tegra114-dsi";

			reg = <0x54300000 0x00040000>;

			clocks = <&tegra_car TEGRA114_CLK_DSIA>,

				 <&tegra_car TEGRA114_CLK_DSIALP>,

				 <&tegra_car TEGRA114_CLK_PLL_D_OUT0>;

			clock-names = "dsi", "lp", "parent";

			resets = <&tegra_car 48>;

			reset-names = "dsi";

			nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */

			status = "disabled";



			#address-cells = <1>;

			#size-cells = <0>;

		};



		dsi@54400000 {

			compatible = "nvidia,tegra114-dsi";

			reg = <0x54400000 0x00040000>;

			clocks = <&tegra_car TEGRA114_CLK_DSIB>,

				 <&tegra_car TEGRA114_CLK_DSIBLP>,

				 <&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;

			clock-names = "dsi", "lp", "parent";

			resets = <&tegra_car 82>;

			reset-names = "dsi";

			nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */

			status = "disabled";



			#address-cells = <1>;

			#size-cells = <0>;

		};

	};



	gic: interrupt-controller@50041000 {

		compatible = "arm,cortex-a15-gic";

		#interrupt-cells = <3>;
@@ -480,6 +586,13 @@ 
		};

	};



	mipi: mipi@700e3000 {

		compatible = "nvidia,tegra114-mipi";

		reg = <0x700e3000 0x100>;

		clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;

		#nvidia,mipi-calibrate-cells = <1>;

	};



	sdhci@78000000 {

		compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";

		reg = <0x78000000 0x200>;

arch/arm/boot/dts/tegra124-venice2.dts

+680 −49

File changed.

Preview size limit exceeded, changes collapsed.

arch/arm/boot/dts/tegra20-colibri-512.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -4,6 +4,11 @@ 
	model = "Toradex Colibri T20 512MB";

	compatible = "toradex,colibri_t20-512", "nvidia,tegra20";



	aliases {

		rtc0 = "/i2c@7000d000/tps6586x@34";

		rtc1 = "/rtc@7000e000";

	};



	memory {

		reg = <0x00000000 0x20000000>;

	};

arch/arm/boot/dts/tegra20-harmony.dts

+39 −2
Original line number Diff line number Diff line
@@ -7,11 +7,24 @@ 
	model = "NVIDIA Tegra20 Harmony evaluation board";

	compatible = "nvidia,harmony", "nvidia,tegra20";



	aliases {

		rtc0 = "/i2c@7000d000/tps6586x@34";

		rtc1 = "/rtc@7000e000";

	};



	memory {

		reg = <0x00000000 0x40000000>;

	};



	host1x@50000000 {

		dc@54200000 {

			rgb {

				status = "okay";



				nvidia,panel = <&panel>;

			};

		};



		hdmi@54280000 {

			status = "okay";
@@ -256,6 +269,10 @@ 
		status = "okay";

	};



	pwm: pwm@7000a000 {

		status = "okay";

	};



	i2c@7000c000 {

		status = "okay";

		clock-frequency = <400000>;
@@ -601,6 +618,17 @@ 
		bus-width = <8>;

	};



	backlight: backlight {

		compatible = "pwm-backlight";



		enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;

		power-supply = <&vdd_bl_reg>;

		pwms = <&pwm 0 5000000>;



		brightness-levels = <0 4 8 16 32 64 128 255>;

		default-brightness-level = <6>;

	};



	clocks {

		compatible = "simple-bus";

		#address-cells = <1>;
@@ -625,6 +653,15 @@ 
		};

	};



	panel: panel {

		compatible = "auo,b101aw03", "simple-panel";



		power-supply = <&vdd_pnl_reg>;

		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;



		backlight = <&backlight>;

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;
@@ -668,7 +705,7 @@ 
			enable-active-high;

		};



		regulator@4 {

		vdd_pnl_reg: regulator@4 {

			compatible = "regulator-fixed";

			reg = <4>;

			regulator-name = "vdd_pnl";
@@ -678,7 +715,7 @@ 
			enable-active-high;

		};



		regulator@5 {

		vdd_bl_reg: regulator@5 {

			compatible = "regulator-fixed";

			reg = <5>;

			regulator-name = "vdd_bl";

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