Commit 5aceaab3 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-3.14-dt' of... 

Merge tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

From Stephen Warren:
ARM: tegra: device tree changes

This branch contains all the changes to Tegra's device tree. The
highlights are:

* Many patches for Tegra124 SoC support, and the Venice2 board which
  uses that SoC.
* Conversion to use more headers providing named constants for pinctrl
  and key codes, which improves readability.
* A few cleanups.

This branch is based on tag tegra-for-3.14-dmas-resets-rework in order
to avoid conflicts with the DT changes required to use the common
bindings for DMAs and resets.

* tag 'tegra-for-3.14-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

: (24 commits)
  ARM: tegra: Add SPI controller nodes for Tegra124
  ARM: tegra: Fix misconfiguration of pin PH2 on Venice2
  ARM: tegra: fix pinctrl misconfiguration on Venice2
  ARM: tegra: add default pinctrl nodes for Venice2
  ARM: tegra: correct Colibri T20 regulator settings
  ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
  ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines
  ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines
  ARM: tegra: Add header file for pinctrl constants
  ARM: tegra: convert device tree files to use key defines
  ARM: tegra: Enable PWM on Venice2
  ARM: tegra: Add Tegra124 PWM support
  ARM: tegra: add sound card to Venice2 DT
  ARM: tegra: add audio-related device to Tegra124 DT
  ARM: tegra: enable I2C controllers on Venice2
  ARM: tegra: add I2C controllers to Tegra124 DT
  ARM: tegra: add MMC controllers to Tegra124 DT
  ARM: tegra: add Tegra124 pinmux node to DT
  ARM: tegra: add APB DMA controller to Tegra124 DT
  ARM: tegra: add reset properties to Tegra124 DTs
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 770039fe 9f1ac560

arch/arm/boot/dts/tegra114-dalmore.dts

+283 −283

File changed.

Preview size limit exceeded, changes collapsed.

arch/arm/boot/dts/tegra114.dtsi

+13 −12
Original line number Diff line number Diff line 
#include <dt-bindings/clock/tegra114-car.h>

#include <dt-bindings/gpio/tegra-gpio.h>

#include <dt-bindings/pinctrl/pinctrl-tegra.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



#include "skeleton.dtsi"
@@ -15,7 +16,7 @@ 
		serial3 = &uartd;

	};



	gic: interrupt-controller {

	gic: interrupt-controller@50041000 {

		compatible = "arm,cortex-a15-gic";

		#interrupt-cells = <3>;

		interrupt-controller;
@@ -39,14 +40,14 @@ 
		clocks = <&tegra_car TEGRA114_CLK_TIMER>;

	};



	tegra_car: clock {

	tegra_car: clock@60006000 {

		compatible = "nvidia,tegra114-car";

		reg = <0x60006000 0x1000>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	apbdma: dma {

	apbdma: dma@6000a000 {

		compatible = "nvidia,tegra114-apbdma";

		reg = <0x6000a000 0x1400>;

		interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
@@ -87,12 +88,12 @@ 
		#dma-cells = <1>;

	};



	ahb: ahb {

	ahb: ahb@6000c004 {

		compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";

		reg = <0x6000c004 0x14c>;

	};



	gpio: gpio {

	gpio: gpio@6000d000 {

		compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";

		reg = <0x6000d000 0x1000>;

		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
@@ -109,7 +110,7 @@ 
		interrupt-controller;

	};



	pinmux: pinmux {

	pinmux: pinmux@70000868 {

		compatible = "nvidia,tegra114-pinmux";

		reg = <0x70000868 0x148		/* Pad control registers */

		       0x70003000 0x40c>;	/* Mux registers */
@@ -175,7 +176,7 @@ 
		status = "disabled";

	};



	pwm: pwm {

	pwm: pwm@7000a000 {

		compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";

		reg = <0x7000a000 0x100>;

		#pwm-cells = <2>;
@@ -350,14 +351,14 @@ 
		status = "disabled";

	};



	rtc {

	rtc@7000e000 {

		compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";

		reg = <0x7000e000 0x100>;

		interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&tegra_car TEGRA114_CLK_RTC>;

	};



	kbc {

	kbc@7000e200 {

		compatible = "nvidia,tegra114-kbc";

		reg = <0x7000e200 0x100>;

		interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -367,14 +368,14 @@ 
		status = "disabled";

	};



	pmc {

	pmc@7000e400 {

		compatible = "nvidia,tegra114-pmc";

		reg = <0x7000e400 0x400>;

		clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;

		clock-names = "pclk", "clk32k_in";

	};



	iommu {

	iommu@70019010 {

		compatible = "nvidia,tegra114-smmu", "nvidia,tegra30-smmu";

		reg = <0x70019010 0x02c

		       0x700191f0 0x010
@@ -385,7 +386,7 @@ 
		nvidia,ahb = <&ahb>;

	};



	ahub {

	ahub@70080000 {

		compatible = "nvidia,tegra114-ahub";

		reg = <0x70080000 0x200>,

		      <0x70080200 0x100>,

arch/arm/boot/dts/tegra124-venice2.dts

+433 −0
Original line number Diff line number Diff line
@@ -10,10 +10,390 @@ 
		reg = <0x80000000 0x80000000>;

	};



	pinmux: pinmux@70000868 {

		pinctrl-names = "default";

		pinctrl-0 = <&pinmux_default>;



		pinmux_default: common {

			dap_mclk1_pw4 {

				nvidia,pins = "dap_mclk1_pw4";

				nvidia,function = "extperiph1";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			dap1_din_pn1 {

				nvidia,pins = "dap1_din_pn1",

					      "dap1_dout_pn2",

					      "dap1_fs_pn0",

					      "dap1_sclk_pn3";

				nvidia,function = "i2s0";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			dap2_din_pa4 {

				nvidia,pins = "dap2_din_pa4",

					      "dap2_dout_pa5",

					      "dap2_fs_pa2",

					      "dap2_sclk_pa3";

				nvidia,function = "i2s1";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			dvfs_pwm_px0 {

				nvidia,pins = "dvfs_pwm_px0";

				nvidia,function = "cldvfs";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			dvfs_clk_px2 {

				nvidia,pins = "dvfs_clk_px2";

				nvidia,function = "cldvfs";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			ulpi_clk_py0 {

				nvidia,pins = "ulpi_clk_py0",

					      "ulpi_dir_py1",

					      "ulpi_nxt_py2",

					      "ulpi_stp_py3";

				nvidia,function = "spi1";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			cam_i2c_scl_pbb1 {

				nvidia,pins = "cam_i2c_scl_pbb1",

					      "cam_i2c_sda_pbb2";

				nvidia,function = "i2c3";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,lock = <TEGRA_PIN_DISABLE>;

				nvidia,open-drain = <TEGRA_PIN_ENABLE>;

			};

			gen2_i2c_scl_pt5 {

				nvidia,pins = "gen2_i2c_scl_pt5",

					      "gen2_i2c_sda_pt6";

				nvidia,function = "i2c2";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,lock = <TEGRA_PIN_DISABLE>;

				nvidia,open-drain = <TEGRA_PIN_ENABLE>;

			};

			pg4 {

				nvidia,pins = "pg4",

					      "pg5",

					      "pg6",

					      "pg7",

					      "pi3";

				nvidia,function = "spi4";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			ph0 {

				nvidia,pins = "ph0";

				nvidia,function = "pwm0";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			ph1 {

				nvidia,pins = "ph1";

				nvidia,function = "pwm1";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			ph2 {

				nvidia,pins = "ph2";

				nvidia,function = "gmi";

				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

			};

			sdmmc1_clk_pz0 {

				nvidia,pins = "sdmmc1_clk_pz0",

					      "sdmmc1_cmd_pz1",

					      "sdmmc1_dat0_py7",

					      "sdmmc1_dat1_py6",

					      "sdmmc1_dat2_py5",

					      "sdmmc1_dat3_py4";

				nvidia,function = "sdmmc1";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			sdmmc3_clk_pa6 {

				nvidia,pins = "sdmmc3_clk_pa6";

				nvidia,function = "sdmmc3";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			sdmmc3_cmd_pa7 {

				nvidia,pins = "sdmmc3_cmd_pa7",

					      "sdmmc3_dat0_pb7",

					      "sdmmc3_dat1_pb6",

					      "sdmmc3_dat2_pb5",

					      "sdmmc3_dat3_pb4",

					      "sdmmc3_clk_lb_out_pee4",

					      "sdmmc3_clk_lb_in_pee5";

				nvidia,function = "sdmmc3";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			sdmmc4_clk_pcc4 {

				nvidia,pins = "sdmmc4_clk_pcc4";

				nvidia,function = "sdmmc4";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			sdmmc4_cmd_pt7 {

				nvidia,pins = "sdmmc4_cmd_pt7",

					      "sdmmc4_dat0_paa0",

					      "sdmmc4_dat1_paa1",

					      "sdmmc4_dat2_paa2",

					      "sdmmc4_dat3_paa3",

					      "sdmmc4_dat4_paa4",

					      "sdmmc4_dat5_paa5",

					      "sdmmc4_dat6_paa6",

					      "sdmmc4_dat7_paa7";

				nvidia,function = "sdmmc4";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			pwr_i2c_scl_pz6 {

				nvidia,pins = "pwr_i2c_scl_pz6",

					      "pwr_i2c_sda_pz7";

				nvidia,function = "i2cpwr";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,open-drain = <TEGRA_PIN_ENABLE>;

			};

			jtag_rtck {

				nvidia,pins = "jtag_rtck";

				nvidia,function = "rtck";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			clk_32k_in {

				nvidia,pins = "clk_32k_in";

				nvidia,function = "clk";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			core_pwr_req {

				nvidia,pins = "core_pwr_req";

				nvidia,function = "pwron";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			cpu_pwr_req {

				nvidia,pins = "cpu_pwr_req";

				nvidia,function = "cpu";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			pwr_int_n {

				nvidia,pins = "pwr_int_n";

				nvidia,function = "pmi";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			reset_out_n {

				nvidia,pins = "reset_out_n";

				nvidia,function = "reset_out_n";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			clk3_out_pee0 {

				nvidia,pins = "clk3_out_pee0";

				nvidia,function = "extperiph3";

				nvidia,enable-input = <TEGRA_PIN_DISABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			dap4_din_pp5 {

				nvidia,pins = "dap4_din_pp5",

					      "dap4_dout_pp6",

					      "dap4_fs_pp4",

					      "dap4_sclk_pp7";

				nvidia,function = "i2s3";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			gen1_i2c_sda_pc5 {

				nvidia,pins = "gen1_i2c_sda_pc5",

					      "gen1_i2c_scl_pc4";

				nvidia,function = "i2c1";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,lock = <TEGRA_PIN_DISABLE>;

				nvidia,open-drain = <TEGRA_PIN_DISABLE>;

			};

			pu0 {

				nvidia,pins = "pu0",

					      "pu1",

					      "pu2",

					      "pu3";

				nvidia,function = "uarta";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			uart2_cts_n_pj5 {

				nvidia,pins = "uart2_cts_n_pj5",

					      "uart2_rts_n_pj6";

				nvidia,function = "uartb";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			uart2_rxd_pc3 {

				nvidia,pins = "uart2_rxd_pc3",

					      "uart2_txd_pc2";

				nvidia,function = "irda";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			uart3_cts_n_pa1 {

				nvidia,pins = "uart3_cts_n_pa1",

					      "uart3_rts_n_pc0",

					      "uart3_rxd_pw7",

					      "uart3_txd_pw6";

				nvidia,function = "uartc";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			hdmi_cec_pee3 {

				nvidia,pins = "hdmi_cec_pee3";

				nvidia,function = "cec";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,open-drain = <TEGRA_PIN_ENABLE>;

			};

			ddc_scl_pv4 {

				nvidia,pins = "ddc_scl_pv4",

					      "ddc_sda_pv5";

				nvidia,function = "i2c4";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			usb_vbus_en0_pn4 {

				nvidia,pins = "usb_vbus_en0_pn4";

				nvidia,function = "usb";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,lock = <TEGRA_PIN_DISABLE>;

				nvidia,open-drain = <TEGRA_PIN_DISABLE>;

			};

			usb_vbus_en1_pn5 {

				nvidia,pins = "usb_vbus_en1_pn5";

				nvidia,function = "usb";

				nvidia,enable-input = <TEGRA_PIN_ENABLE>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

				nvidia,lock = <TEGRA_PIN_DISABLE>;

				nvidia,open-drain = <TEGRA_PIN_DISABLE>;

			};

			drive_sdio1 {

				nvidia,pins = "drive_sdio1";

				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;

				nvidia,schmitt = <TEGRA_PIN_DISABLE>;

				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;

				nvidia,pull-down-strength = <32>;

				nvidia,pull-up-strength = <42>;

				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;

				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;

			};

			drive_sdio3 {

				nvidia,pins = "drive_sdio3";

				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;

				nvidia,schmitt = <TEGRA_PIN_DISABLE>;

				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;

				nvidia,pull-down-strength = <20>;

				nvidia,pull-up-strength = <36>;

				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;

				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;

			};

			drive_gma {

				nvidia,pins = "drive_gma";

				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;

				nvidia,schmitt = <TEGRA_PIN_DISABLE>;

				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;

				nvidia,pull-down-strength = <1>;

				nvidia,pull-up-strength = <2>;

				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;

				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;

				nvidia,drive-type = <1>;

			};

		};

	};



	serial@70006000 {

		status = "okay";

	};



	pwm: pwm@7000a000 {

		status = "okay";

	};



	i2c@7000c000 {

		status = "okay";

		clock-frequency = <100000>;



		acodec: audio-codec@10 {

			compatible = "maxim,max98090";

			reg = <0x10>;

			interrupt-parent = <&gpio>;

			interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;

		};

	};



	i2c@7000c400 {

		status = "okay";

		clock-frequency = <100000>;

	};



	i2c@7000c500 {

		status = "okay";

		clock-frequency = <100000>;

	};



	i2c@7000c700 {

		status = "okay";

		clock-frequency = <100000>;

	};



	i2c@7000d000 {

		status = "okay";

		clock-frequency = <100000>;

	};



	pmc@7000e400 {

		nvidia,invert-interrupt;

		nvidia,suspend-mode = <1>;
@@ -24,4 +404,57 @@ 
		nvidia,core-power-req-active-high;

		nvidia,sys-clock-req-active-high;

	};



	sdhci@700b0400 {

		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;

		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;

		status = "okay";

		bus-width = <4>;

	};



	sdhci@700b0600 {

		status = "okay";

		bus-width = <8>;

	};



	ahub@70300000 {

		i2s@70301100 {

			status = "okay";

		};

	};



	clocks {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		clk32k_in: clock@0 {

			compatible = "fixed-clock";

			reg=<0>;

			#clock-cells = <0>;

			clock-frequency = <32768>;

		};

	};



	sound {

		compatible = "nvidia,tegra-audio-max98090-venice2",

			     "nvidia,tegra-audio-max98090";

		nvidia,model = "NVIDIA Tegra Venice2";



		nvidia,audio-routing =

			"Headphones", "HPR",

			"Headphones", "HPL",

			"Speakers", "SPKR",

			"Speakers", "SPKL",

			"Mic Jack", "MICBIAS",

			"IN34", "Mic Jack";



		nvidia,i2s-controller = <&tegra_i2s1>;

		nvidia,audio-codec = <&acodec>;



		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,

			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA124_CLK_EXTERN1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};

};

arch/arm/boot/dts/tegra124.dtsi

+418 −0

File changed.

Preview size limit exceeded, changes collapsed.

arch/arm/boot/dts/tegra20-colibri-512.dtsi

+100 −100
Original line number Diff line number Diff line
@@ -8,8 +8,8 @@ 
		reg = <0x00000000 0x20000000>;

	};



	host1x {

		hdmi {

	host1x@50000000 {

		hdmi@54280000 {

			vdd-supply = <&hdmi_vdd_reg>;

			pll-supply = <&hdmi_pll_reg>;
@@ -19,7 +19,7 @@ 
		};

	};



	pinmux {

	pinmux@70000014 {

		pinctrl-names = "default";

		pinctrl-0 = <&state_default>;
@@ -27,20 +27,20 @@ 
			audio_refclk {

				nvidia,pins = "cdev1";

				nvidia,function = "plla_out";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			crt {

				nvidia,pins = "crtp";

				nvidia,function = "crt";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			dap3 {

				nvidia,pins = "dap3";

				nvidia,function = "dap3";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			displaya {

				nvidia,pins = "ld0", "ld1", "ld2", "ld3",
@@ -50,155 +50,163 @@ 
					"lhs", "lpw0", "lpw2", "lsc0",

					"lsc1", "lsck", "lsda", "lspi", "lvs";

				nvidia,function = "displaya";

				nvidia,tristate = <1>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			gpio_dte {

				nvidia,pins = "dte";

				nvidia,function = "rsvd1";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			gpio_gmi {

				nvidia,pins = "ata", "atc", "atd", "ate",

					"dap1", "dap2", "dap4", "gpu", "irrx",

					"irtx", "spia", "spib", "spic";

				nvidia,function = "gmi";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			gpio_pta {

				nvidia,pins = "pta";

				nvidia,function = "rsvd4";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			gpio_uac {

				nvidia,pins = "uac";

				nvidia,function = "rsvd2";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			hdint {

				nvidia,pins = "hdint";

				nvidia,function = "hdmi";

				nvidia,tristate = <1>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			i2c1 {

				nvidia,pins = "rm";

				nvidia,function = "i2c1";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			i2c3 {

				nvidia,pins = "dtf";

				nvidia,function = "i2c3";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			i2cddc {

				nvidia,pins = "ddc";

				nvidia,function = "i2c2";

				nvidia,pull = <2>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_UP>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			i2cp {

				nvidia,pins = "i2cp";

				nvidia,function = "i2cp";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			irda {

				nvidia,pins = "uad";

				nvidia,function = "irda";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			nand {

				nvidia,pins = "kbca", "kbcc", "kbcd",

					"kbce", "kbcf";

				nvidia,function = "nand";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			owc {

				nvidia,pins = "owc";

				nvidia,function = "owr";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			pmc {

				nvidia,pins = "pmc";

				nvidia,function = "pwr_on";

				nvidia,tristate = <0>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			pwm {

				nvidia,pins = "sdb", "sdc", "sdd";

				nvidia,function = "pwm";

				nvidia,tristate = <1>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			sdio4 {

				nvidia,pins = "atb", "gma", "gme";

				nvidia,function = "sdio4";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			spi1 {

				nvidia,pins = "spid", "spie", "spif";

				nvidia,function = "spi1";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			spi4 {

				nvidia,pins = "slxa", "slxc", "slxd", "slxk";

				nvidia,function = "spi4";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			uarta {

				nvidia,pins = "sdio1";

				nvidia,function = "uarta";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			uartd {

				nvidia,pins = "gmc";

				nvidia,function = "uartd";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			ulpi {

				nvidia,pins = "uaa", "uab", "uda";

				nvidia,function = "ulpi";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			ulpi_refclk {

				nvidia,pins = "cdev2";

				nvidia,function = "pllp_out4";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			usb_gpio {

				nvidia,pins = "spig", "spih";

				nvidia,function = "spi2_alt";

				nvidia,pull = <0>;

				nvidia,tristate = <0>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_DISABLE>;

			};

			vi {

				nvidia,pins = "dta", "dtb", "dtc", "dtd";

				nvidia,function = "vi";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

			vi_sc {

				nvidia,pins = "csus";

				nvidia,function = "vi_sensor_clk";

				nvidia,pull = <0>;

				nvidia,tristate = <1>;

				nvidia,pull = <TEGRA_PIN_PULL_NONE>;

				nvidia,tristate = <TEGRA_PIN_ENABLE>;

			};

		};

	};



	ac97: ac97@70002000 {

		status = "okay";

		nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)

			GPIO_ACTIVE_HIGH>;

		nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)

			GPIO_ACTIVE_HIGH>;

	};



	i2c@7000c000 {

		clock-frequency = <400000>;

	};
@@ -225,15 +233,15 @@ 
			#gpio-cells = <2>;

			gpio-controller;



			sys-supply = <&vdd_5v0_reg>;

			sys-supply = <&vdd_3v3_reg>;

			vin-sm0-supply = <&sys_reg>;

			vin-sm1-supply = <&sys_reg>;

			vin-sm2-supply = <&sys_reg>;

			vinldo01-supply = <&sm2_reg>;

			vinldo23-supply = <&sm2_reg>;

			vinldo4-supply = <&sm2_reg>;

			vinldo678-supply = <&sm2_reg>;

			vinldo9-supply = <&sm2_reg>;

			vinldo23-supply = <&vdd_3v3_reg>;

			vinldo4-supply = <&vdd_3v3_reg>;

			vinldo678-supply = <&vdd_3v3_reg>;

			vinldo9-supply = <&vdd_3v3_reg>;



			regulators {

				#address-cells = <1>;
@@ -250,8 +258,8 @@ 
					reg = <1>;

					regulator-compatible = "sm0";

					regulator-name = "vdd_sm0,vdd_core";

					regulator-min-microvolt = <1275000>;

					regulator-max-microvolt = <1275000>;

					regulator-min-microvolt = <1200000>;

					regulator-max-microvolt = <1200000>;

					regulator-always-on;

				};
@@ -259,8 +267,8 @@ 
					reg = <2>;

					regulator-compatible = "sm1";

					regulator-name = "vdd_sm1,vdd_cpu";

					regulator-min-microvolt = <1100000>;

					regulator-max-microvolt = <1100000>;

					regulator-min-microvolt = <1000000>;

					regulator-max-microvolt = <1000000>;

					regulator-always-on;

				};
@@ -316,8 +324,8 @@ 
					reg = <10>;

					regulator-compatible = "ldo6";

					regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";

					regulator-min-microvolt = <1800000>;

					regulator-max-microvolt = <1800000>;

					regulator-min-microvolt = <2850000>;

					regulator-max-microvolt = <2850000>;

				};



				hdmi_vdd_reg: regulator@11 {
@@ -362,7 +370,7 @@ 
		};

	};



	pmc {

	pmc@7000e400 {

		nvidia,suspend-mode = <1>;

		nvidia,cpu-pwr-good-time = <5000>;

		nvidia,cpu-pwr-off-time = <5000>;
@@ -442,14 +450,6 @@ 
		};

	};



	ac97: ac97 {

		status = "okay";

		nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)

			GPIO_ACTIVE_HIGH>;

		nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)

			GPIO_ACTIVE_HIGH>;

	};



	usb@c5004000 {

		status = "okay";

		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
@@ -471,7 +471,7 @@ 
		#address-cells = <1>;

		#size-cells = <0>;



		clk32k_in: clock {

		clk32k_in: clock@0 {

			compatible = "fixed-clock";

			reg=<0>;

			#clock-cells = <0>;
@@ -479,37 +479,17 @@ 
		};

	};



	sound {

		compatible = "nvidia,tegra-audio-wm9712-colibri_t20",

			         "nvidia,tegra-audio-wm9712";

		nvidia,model = "Colibri T20 AC97 Audio";



		nvidia,audio-routing =

			"Headphone", "HPOUTL",

			"Headphone", "HPOUTR",

			"LineIn", "LINEINL",

			"LineIn", "LINEINR",

			"Mic", "MIC1";



		nvidia,ac97-controller = <&ac97>;



		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,

			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA20_CLK_CDEV1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		vdd_5v0_reg: regulator@100 {

		vdd_3v3_reg: regulator@100 {

			compatible = "regulator-fixed";

			reg = <100>;

			regulator-name = "vdd_5v0";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

			regulator-name = "vdd_3v3";

			regulator-min-microvolt = <3300000>;

			regulator-max-microvolt = <3300000>;

			regulator-always-on;

		};
@@ -525,4 +505,24 @@ 
			gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;

		};

	};



	sound {

		compatible = "nvidia,tegra-audio-wm9712-colibri_t20",

			         "nvidia,tegra-audio-wm9712";

		nvidia,model = "Colibri T20 AC97 Audio";



		nvidia,audio-routing =

			"Headphone", "HPOUTL",

			"Headphone", "HPOUTR",

			"LineIn", "LINEINL",

			"LineIn", "LINEINR",

			"Mic", "MIC1";



		nvidia,ac97-controller = <&ac97>;



		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,

			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

			 <&tegra_car TEGRA20_CLK_CDEV1>;

		clock-names = "pll_a", "pll_a_out0", "mclk";

	};

};

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