Commit 86d377db authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'mvebu-dt-3.20' of git://git.infradead.org/linux-mvebu into next/dt

Merge "mvebu: dt for v3.20" from Andrew Lunn:

mvebu dt changes for v3.20 (part #1)

- Add Armada 388 General Purpose Development Board support
- Add Device Tree description of the Armada 388 SoC
- Document the Device Tree binding for the Armada 388 SoC
- a38x: Add missing labels
- a38x: Add more pinctrl functions
- Add Armada 385 Access Point Development Board support
- Add a number of pinctrl functions
- A38x: Remove redundant pinctrl informations
- a38x: Fix node names
- Add support for Seagate BlackArmor NAS220
- kirkwood: enable phy driver for SATA controller on 88f6192
- gpio_poweroff support for Iomega ix2-200
- Use all remaining MTD space foor rootfs of Iomega ix2-200

* tag 'mvebu-dt-3.20' of git://git.infradead.org/linux-mvebu

:
  ARM: mvebu: Add Armada 388 General Purpose Development Board support
  ARM: mvebu: Add Device Tree description of the Armada 388 SoC
  ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
  ARM: mvebu: a38x: Add missing labels
  ARM: mvebu: a38x: Add more pinctrl functions
  ARM: mvebu: Add Armada 385 Access Point Development Board support
  ARM: mvebu: Add a number of pinctrl functions
  ARM: mvebu: A38x: Remove redundant pinctrl informations
  ARM: mvebu: a38x: Fix node names
  Kirkwood: add support for Seagate BlackArmor NAS220
  ARM: dts: kirkwood: enable phy driver for SATA controller on 88f6192
  ARM: dts: add gpio_poweroff support for Iomega ix2-200
  ARM: dts: use all remaining MTD space foor rootfs of Iomega ix2-200

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 9a7b711e 928413bd
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+7 −0
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@@ -15,6 +15,13 @@ Required root node property:

compatible: must contain "marvell,armada385"

In addition, boards using the Marvell Armada 388 SoC shall have the
following property before the previous one:

Required root node property:

compatible: must contain "marvell,armada388"

Example:

compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
+5 −2
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@@ -130,6 +130,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
	k2e-evm.dtb
dtb-$(CONFIG_MACH_KIRKWOOD) += \
	kirkwood-b3.dtb \
	kirkwood-blackarmor-nas220.dtb \
	kirkwood-cloudbox.dtb \
	kirkwood-d2net.dtb \
	kirkwood-db-88f6281.dtb \
@@ -602,8 +603,10 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
dtb-$(CONFIG_MACH_ARMADA_375) += \
	armada-375-db.dtb
dtb-$(CONFIG_MACH_ARMADA_38X) += \
	armada-385-db.dtb \
	armada-385-rd.dtb
	armada-385-db-ap.dtb \
	armada-388-db.dtb \
	armada-388-gp.dtb \
	armada-388-rd.dtb
dtb-$(CONFIG_MACH_ARMADA_XP) += \
	armada-xp-axpwifiap.dtb \
	armada-xp-db.dtb \
+1 −2
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@@ -32,9 +32,8 @@

	soc {
		internal-regs {
			pinctrl {
			pinctrl@18000 {
				compatible = "marvell,mv88f6810-pinctrl";
				reg = <0x18000 0x20>;
			};
		};

+178 −0
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/*
 * Device Tree file for Marvell Armada 385 Access Point Development board
 * (DB-88F6820-AP)
 *
 *  Copyright (C) 2014 Marvell
 *
 * Nadav Haklai <nadavh@marvell.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is licensed under the terms of the GNU General Public
 *     License version 2.  This program is licensed "as is" without
 *     any warranty of any kind, whether express or implied.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "armada-385.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Marvell Armada 385 Access Point Development Board";
	compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada38x";

	chosen {
		bootargs = "console=ttyS0,115200";
		stdout-path = &uart1;
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x80000000>; /* 2GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;

		internal-regs {
			spi1: spi@10680 {
				pinctrl-names = "default";
				pinctrl-0 = <&spi1_pins>;
				status = "okay";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "st,m25p128";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <54000000>;
				};
			};

			i2c0: i2c@11000 {
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins>;
				status = "okay";

				/*
				 * This bus is wired to two EEPROM
				 * sockets, one of which holding the
				 * board ID used by the	bootloader.
				 * Erasing this EEPROM's content will
				 * brick the board.
				 * Use this bus with caution.
				 */
			};

			mdio@72004 {
				pinctrl-names = "default";
				pinctrl-0 = <&mdio_pins>;

				phy0: ethernet-phy@1 {
					reg = <1>;
				};

				phy1: ethernet-phy@4 {
					reg = <4>;
				};

				phy2: ethernet-phy@6 {
					reg = <6>;
				};
			};

			/* UART0 is exposed through the JP8 connector */
			uart0: serial@12000 {
				pinctrl-names = "default";
				pinctrl-0 = <&uart0_pins>;
				status = "okay";
			};

			/*
			 * UART1 is exposed through a FTDI chip
			 * wired to the mini-USB connector
			 */
			uart1: serial@12100 {
				pinctrl-names = "default";
				pinctrl-0 = <&uart1_pins>;
				status = "okay";
			};

			ethernet@30000 {
				status = "okay";
				phy = <&phy2>;
				phy-mode = "sgmii";
			};

			ethernet@34000 {
				status = "okay";
				phy = <&phy1>;
				phy-mode = "sgmii";
			};

			ethernet@70000 {
				pinctrl-names = "default";

				/*
				 * The Reference Clock 0 is used to
				 * provide a clock to the PHY
				 */
				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};
		};

		pcie-controller {
			status = "okay";

			/*
			 * The three PCIe units are accessible through
			 * standard mini-PCIe slots on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};

			pcie@3,0 {
				/* Port 2, Lane 0 */
				status = "okay";
			};
		};
	};
};
+1 −2
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@@ -37,9 +37,8 @@

	soc {
		internal-regs {
			pinctrl {
			pinctrl@18000 {
				compatible = "marvell,mv88f6820-pinctrl";
				reg = <0x18000 0x20>;
			};
		};

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