Commit 858b8a80 authored by Anshuman Khandual's avatar Anshuman Khandual Committed by Will Deacon
Browse files

arm64/cpuinfo: Add ID_MMFR4_EL1 into the cpuinfo_arm64 context 



ID_MMFR4_EL1 has been missing in the CPU context (i.e cpuinfo_arm64). This
just adds the register along with other required changes.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org

Suggested-by: default avatarWill Deacon <will@kernel.org>
Signed-off-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-18-git-send-email-anshuman.khandual@arm.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 14e270fa

arch/arm64/include/asm/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ struct cpuinfo_arm64 { 
	u32		reg_id_mmfr1;

	u32		reg_id_mmfr2;

	u32		reg_id_mmfr3;

	u32		reg_id_mmfr4;

	u32		reg_id_mmfr5;

	u32		reg_id_pfr0;

	u32		reg_id_pfr1;

arch/arm64/kernel/cpufeature.c

+4 −0
Original line number Diff line number Diff line
@@ -764,6 +764,7 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info) 
		init_cpu_ftr_reg(SYS_ID_MMFR1_EL1, info->reg_id_mmfr1);

		init_cpu_ftr_reg(SYS_ID_MMFR2_EL1, info->reg_id_mmfr2);

		init_cpu_ftr_reg(SYS_ID_MMFR3_EL1, info->reg_id_mmfr3);

		init_cpu_ftr_reg(SYS_ID_MMFR4_EL1, info->reg_id_mmfr4);

		init_cpu_ftr_reg(SYS_ID_MMFR5_EL1, info->reg_id_mmfr5);

		init_cpu_ftr_reg(SYS_ID_PFR0_EL1, info->reg_id_pfr0);

		init_cpu_ftr_reg(SYS_ID_PFR1_EL1, info->reg_id_pfr1);
@@ -899,6 +900,8 @@ static int update_32bit_cpu_features(int cpu, struct cpuinfo_arm64 *info, 
				      info->reg_id_mmfr2, boot->reg_id_mmfr2);

	taint |= check_update_ftr_reg(SYS_ID_MMFR3_EL1, cpu,

				      info->reg_id_mmfr3, boot->reg_id_mmfr3);

	taint |= check_update_ftr_reg(SYS_ID_MMFR4_EL1, cpu,

				      info->reg_id_mmfr4, boot->reg_id_mmfr4);

	taint |= check_update_ftr_reg(SYS_ID_MMFR5_EL1, cpu,

				      info->reg_id_mmfr5, boot->reg_id_mmfr5);

	taint |= check_update_ftr_reg(SYS_ID_PFR0_EL1, cpu,
@@ -1041,6 +1044,7 @@ static u64 __read_sysreg_by_encoding(u32 sys_id) 
	read_sysreg_case(SYS_ID_MMFR1_EL1);

	read_sysreg_case(SYS_ID_MMFR2_EL1);

	read_sysreg_case(SYS_ID_MMFR3_EL1);

	read_sysreg_case(SYS_ID_MMFR4_EL1);

	read_sysreg_case(SYS_ID_MMFR5_EL1);

	read_sysreg_case(SYS_ID_ISAR0_EL1);

	read_sysreg_case(SYS_ID_ISAR1_EL1);

arch/arm64/kernel/cpuinfo.c

+1 −0
Original line number Diff line number Diff line
@@ -374,6 +374,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info) 
		info->reg_id_mmfr1 = read_cpuid(ID_MMFR1_EL1);

		info->reg_id_mmfr2 = read_cpuid(ID_MMFR2_EL1);

		info->reg_id_mmfr3 = read_cpuid(ID_MMFR3_EL1);

		info->reg_id_mmfr4 = read_cpuid(ID_MMFR4_EL1);

		info->reg_id_mmfr5 = read_cpuid(ID_MMFR5_EL1);

		info->reg_id_pfr0 = read_cpuid(ID_PFR0_EL1);

		info->reg_id_pfr1 = read_cpuid(ID_PFR1_EL1);

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