arm64/cpufeature: Add remaining feature bits in ID_AA64PFR1 register (14e270fa) · Commits · 戴 / test

Enable the following features bits in ID_AA64PFR1 register as per ARM DDI 0487F.a specification. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Suggested-by:

Will Deacon <will@kernel.org> Signed-off-by:

Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by:

Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/1589881254-10082-12-git-send-email-anshuman.khandual@arm.com Signed-off-by:

Will Deacon <will@kernel.org>

arch/arm64/include/asm/sysreg.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -670,7 +670,11 @@
		#define ID_AA64PFR0_EL0_32BIT_64BIT 0x2

		/* id_aa64pfr1 */
		#define ID_AA64PFR1_MPAMFRAC_SHIFT 16
		#define ID_AA64PFR1_RASFRAC_SHIFT 12
		#define ID_AA64PFR1_MTE_SHIFT 8
		#define ID_AA64PFR1_SSBS_SHIFT 4
		#define ID_AA64PFR1_BT_SHIFT 0

		#define ID_AA64PFR1_SSBS_PSTATE_NI 0
		#define ID_AA64PFR1_SSBS_PSTATE_ONLY 1

arch/arm64/kernel/cpufeature.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -238,6 +238,8 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {
		};

		static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = {
		ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_MPAMFRAC_SHIFT, 4, 0),
		ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_RASFRAC_SHIFT, 4, 0),
		ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_SSBS_SHIFT, 4, ID_AA64PFR1_SSBS_PSTATE_NI),
		ARM64_FTR_END,
		};

Admin message