Commit 84eaaf75 authored by Vidya Sagar's avatar Vidya Sagar Committed by Thierry Reding
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arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform



Add endpoint mode support for PCIe C5 controller in P2972-0000 platform
with information about supplies, PHY, PERST GPIO and GPIO that controls
PCIe reference clock coming from the host system.

Signed-off-by: default avatarVidya Sagar <vidyas@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 0c988b73
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+18 −0
Original line number Diff line number Diff line
@@ -199,6 +199,24 @@
			    "p2u-5", "p2u-6", "p2u-7";
	};

	pcie_ep@141a0000 {
		status = "disabled";

		vddio-pex-ctl-supply = <&vdd_1v8ao>;

		reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;

		nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
					      GPIO_ACTIVE_HIGH>;

		phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
		       <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
		       <&p2u_nvhs_6>, <&p2u_nvhs_7>;

		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
			    "p2u-5", "p2u-6", "p2u-7";
	};

	fan: fan {
		compatible = "pwm-fan";
		pwms = <&pwm4 0 45334>;