Commit 82fc5099 authored by Boris Brezillon's avatar Boris Brezillon Committed by Miquel Raynal
Browse files

mtd: rawnand: Create a legacy struct and move ->IO_ADDR_{R, W} there 



We regularly have new NAND controller drivers that are making use of
fields/hooks that we want to get rid of but can't because of all the
legacy drivers that we might break if we do.

So, instead of removing those fields/hooks, let's move them to a
sub-struct which is clearly documented as deprecated.

We start with the ->IO_ADDR_{R,W] fields.

Signed-off-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
parent 4ae94025

Documentation/driver-api/mtdnand.rst

+12 −12
Original line number Diff line number Diff line
@@ -180,10 +180,10 @@ by a chip select decoder. 
    {

        struct nand_chip *this = mtd_to_nand(mtd);

        switch(cmd){

            case NAND_CTL_SETCLE: this->IO_ADDR_W |= CLE_ADRR_BIT;  break;

            case NAND_CTL_CLRCLE: this->IO_ADDR_W &= ~CLE_ADRR_BIT; break;

            case NAND_CTL_SETALE: this->IO_ADDR_W |= ALE_ADRR_BIT;  break;

            case NAND_CTL_CLRALE: this->IO_ADDR_W &= ~ALE_ADRR_BIT; break;

            case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT;  break;

            case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;

            case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT;  break;

            case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;

        }

    }
@@ -235,8 +235,8 @@ necessary information about the device. 
        }



        /* Set address of NAND IO lines */

        this->IO_ADDR_R = baseaddr;

        this->IO_ADDR_W = baseaddr;

        this->legacy.IO_ADDR_R = baseaddr;

        this->legacy.IO_ADDR_W = baseaddr;

        /* Reference hardware control function */

        this->hwcontrol = board_hwcontrol;

        /* Set command delay time, see datasheet for correct value */
@@ -336,17 +336,17 @@ connected to an address decoder. 
        struct nand_chip *this = mtd_to_nand(mtd);



        /* Deselect all chips */

        this->IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;

        this->IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;

        this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;

        this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;

        switch (chip) {

        case 0:

            this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;

            this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;

            this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;

            this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;

            break;

        ....

        case n:

            this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;

            this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;

            this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;

            this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;

            break;

        }

    }

arch/arm/mach-ep93xx/snappercl15.c

+3 −2
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ 
#define SNAPPERCL15_NAND_CEN	(1 << 11) /* Chip enable (active low) */

#define SNAPPERCL15_NAND_RDY	(1 << 14) /* Device ready */



#define NAND_CTRL_ADDR(chip) 	(chip->IO_ADDR_W + 0x40)

#define NAND_CTRL_ADDR(chip) 	(chip->legacy.IO_ADDR_W + 0x40)



static void snappercl15_nand_cmd_ctrl(struct nand_chip *chip, int cmd,

				      unsigned int ctrl)
@@ -69,7 +69,8 @@ static void snappercl15_nand_cmd_ctrl(struct nand_chip *chip, int cmd, 
	}



	if (cmd != NAND_CMD_NONE)

		__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);

		__raw_writew((cmd & 0xff) | nand_state,

			     chip->legacy.IO_ADDR_W);

}



static int snappercl15_nand_dev_ready(struct nand_chip *chip)

arch/arm/mach-ep93xx/ts72xx.c

+3 −3
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ static void ts72xx_nand_hwcontrol(struct nand_chip *chip, 
				  int cmd, unsigned int ctrl)

{

	if (ctrl & NAND_CTRL_CHANGE) {

		void __iomem *addr = chip->IO_ADDR_R;

		void __iomem *addr = chip->legacy.IO_ADDR_R;

		unsigned char bits;



		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
@@ -94,12 +94,12 @@ static void ts72xx_nand_hwcontrol(struct nand_chip *chip, 
	}



	if (cmd != NAND_CMD_NONE)

		__raw_writeb(cmd, chip->IO_ADDR_W);

		__raw_writeb(cmd, chip->legacy.IO_ADDR_W);

}



static int ts72xx_nand_device_ready(struct nand_chip *chip)

{

	void __iomem *addr = chip->IO_ADDR_R;

	void __iomem *addr = chip->legacy.IO_ADDR_R;



	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);

arch/arm/mach-imx/mach-qong.c

+2 −2
Original line number Diff line number Diff line
@@ -136,9 +136,9 @@ static void qong_nand_cmd_ctrl(struct nand_chip *nand_chip, int cmd, 
		return;



	if (ctrl & NAND_CLE)

		writeb(cmd, nand_chip->IO_ADDR_W + (1 << 24));

		writeb(cmd, nand_chip->legacy.IO_ADDR_W + (1 << 24));

	else

		writeb(cmd, nand_chip->IO_ADDR_W + (1 << 23));

		writeb(cmd, nand_chip->legacy.IO_ADDR_W + (1 << 23));

}



/*

arch/arm/mach-ixp4xx/ixdp425-setup.c

+1 −1
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@ ixdp425_flash_nand_cmd_ctrl(struct nand_chip *this, int cmd, unsigned int ctrl) 
	}



	if (cmd != NAND_CMD_NONE)

		writeb(cmd, this->IO_ADDR_W + offset);

		writeb(cmd, this->legacy.IO_ADDR_W + offset);

}



static struct platform_nand_data ixdp425_flash_nand_data = {

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