Commit 7fbdc6af authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'at91-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt 

AT91 DT for 5.9

 - ClassD pull down fixes
 - Enable RTT as RTC on sam9x60ek
 - Fix phy-mode for sama5d3_xplained

* tag 'at91-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d3_xplained: change phy-mode
  ARM: dts: at91: sama5d2_xplained: Remove pdmic node
  ARM: dts: sam9x60: add rtt
  dt-bindings: rtc: add microchip,sam9x60-rtt
  ARM: dts: at91: sam9x60ek: classd: pull-down the L1 and L3 lines
  ARM: dts: at91: sama5d2_xplained: classd: pull-down the R1 and R3 lines

Link: https://lore.kernel.org/r/20200726193207.GA182066@piout.net


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 4a775263 7dbf4bbf

Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt

+3 −1
Original line number Diff line number Diff line 
Atmel AT91SAM9260 Real Time Timer



Required properties:

- compatible: should be: "atmel,at91sam9260-rtt"

- compatible: should be one of the following:

	- "atmel,at91sam9260-rtt"

	- "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt"

- reg: should encode the memory region of the RTT controller

- interrupts: rtt alarm/event interrupt

- clocks: should contain the 32 KHz slow clk that will drive the RTT block.

arch/arm/boot/dts/at91-sam9x60ek.dts

+11 −2
Original line number Diff line number Diff line
@@ -309,6 +309,10 @@ 
	};

};



&gpbr {

	status = "okay";

};



&i2s {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2s_default>;
@@ -470,9 +474,9 @@ 
		pinctrl_classd_default: classd {

			atmel,pins =

				<AT91_PIOA 24 AT91_PERIPH_C AT91_PINCTRL_PULL_UP

				 AT91_PIOA 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP

				 AT91_PIOA 25 AT91_PERIPH_C AT91_PINCTRL_PULL_DOWN

				 AT91_PIOA 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP

				 AT91_PIOA 27 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;

				 AT91_PIOA 27 AT91_PERIPH_C AT91_PINCTRL_PULL_DOWN>;

		};

	};
@@ -636,6 +640,11 @@ 
	};

};



&rtt {

	atmel,rtt-rtc-time-reg = <&gpbr 0x0>;

	status = "okay";

};



&shutdown_controller {

	atmel,shdwc-debouncer = <976>;

	status = "okay";

arch/arm/boot/dts/at91-sama5d2_xplained.dts

+9 −21
Original line number Diff line number Diff line
@@ -168,16 +168,6 @@ 
				};

			};



			pdmic@f8018000 {

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_pdmic_default>;

				atmel,model = "PDMIC @ sama5d2_xplained";

				atmel,mic-min-freq = <1000000>;

				atmel,mic-max-freq = <3246000>;

				atmel,mic-offset = <0x0>;

				status = "okay";

			};



			uart1: serial@f8020000 {

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_uart1_default>;
@@ -490,14 +480,18 @@ 
					bias-pull-up;

				};



				pinctrl_classd_default: classd_default {

				pinctrl_classd_default_pfets: classd_default_pfets {

					pinmux = <PIN_PB1__CLASSD_R0>,

						 <PIN_PB2__CLASSD_R1>,

						 <PIN_PB3__CLASSD_R2>,

						 <PIN_PB4__CLASSD_R3>;

						 <PIN_PB3__CLASSD_R2>;

					bias-pull-up;

				};



				pinctrl_classd_default_nfets: classd_default_nfets {

					pinmux = <PIN_PB2__CLASSD_R1>,

						 <PIN_PB4__CLASSD_R3>;

					bias-pull-down;

				};



				pinctrl_flx0_default: flx0_default {

					pinmux = <PIN_PB28__FLEXCOM0_IO0>,

						 <PIN_PB29__FLEXCOM0_IO1>;
@@ -595,12 +589,6 @@ 
					bias-disable;

				};



				pinctrl_pdmic_default: pdmic_default {

					pinmux = <PIN_PB26__PDMIC_DAT>,

						<PIN_PB27__PDMIC_CLK>;

					bias-disable;

				};



				pinctrl_qspi0_default: qspi0_default {

					sck_cs {

						pinmux = <PIN_PA22__QSPI0_SCK>,
@@ -696,7 +684,7 @@ 


			classd: classd@fc048000 {

				pinctrl-names = "default";

				pinctrl-0 = <&pinctrl_classd_default>;

				pinctrl-0 = <&pinctrl_classd_default_pfets &pinctrl_classd_default_nfets>;

				atmel,pwm-type = "diff";

				atmel,non-overlap-time = <10>;

				status = "okay";

arch/arm/boot/dts/at91-sama5d3_xplained.dts

+1 −1
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ 
			};



			macb0: ethernet@f0028000 {

				phy-mode = "rgmii";

				phy-mode = "rgmii-rxid";

				#address-cells = <1>;

				#size-cells = <0>;

				status = "okay";

arch/arm/boot/dts/sam9x60.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -661,6 +661,13 @@ 
				status = "disabled";

			};



			rtt: rtt@fffffe20 {

				compatible = "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";

				reg = <0xfffffe20 0x20>;

				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

				clocks = <&clk32k 0>;

			};



			pit: timer@fffffe40 {

				compatible = "atmel,at91sam9260-pit";

				reg = <0xfffffe40 0x10>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE