Commit 7f95167c authored by Jack Xiao's avatar Jack Xiao Committed by Alex Deucher
Browse files

drm/amdgpu: refine the PTE encoding of PRT for navi10 



Due to GCR change from navi10, the PTE encoding of PRT
needs change VSCTL = 01111 (was 0XX1X).

Signed-off-by: default avatarJack Xiao <Jack.Xiao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7596ab68

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+5 −0
Original line number Diff line number Diff line
@@ -1585,6 +1585,11 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, 
	if ((mapping->flags & AMDGPU_PTE_PRT) &&

	    (adev->asic_type >= CHIP_VEGA10)) {

		flags |= AMDGPU_PTE_PRT;

		if (adev->asic_type >= CHIP_NAVI10) {

			flags |= AMDGPU_PTE_SNOOPED;

			flags |= AMDGPU_PTE_LOG;

			flags |= AMDGPU_PTE_SYSTEM;

		}

		flags &= ~AMDGPU_PTE_VALID;

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

+2 −0
Original line number Diff line number Diff line
@@ -67,6 +67,8 @@ struct amdgpu_bo_list_entry; 
/* PDE is handled as PTE for VEGA10 */

#define AMDGPU_PDE_PTE		(1ULL << 54)



#define AMDGPU_PTE_LOG          (1ULL << 55)



/* PTE is handled as PDE for VEGA10 (Translate Further) */

#define AMDGPU_PTE_TF		(1ULL << 56)

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