Commit 7e149368 authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
Browse files

rtw88: 8723d: set ltecoex register address in chip_info 



Since 8723D use different address of ltecoex register, this commit add a
new field in chip_info and fill proper address. Then, ltecoex_read_reg()
and ltecoex_reg_write() can use them to access ltecoex according to chip.

Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarYan-Hsuan Chuang <yhchuang@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200512102621.5148-7-yhchuang@realtek.com
parent 7d754f97

drivers/net/wireless/realtek/rtw88/main.h

+7 −0
Original line number Diff line number Diff line
@@ -519,6 +519,12 @@ struct rtw_hw_reg { 
	u32 mask;

};



struct rtw_ltecoex_addr {

	u32 ctrl;

	u32 wdata;

	u32 rdata;

};



struct rtw_reg_domain {

	u32 addr;

	u32 mask;
@@ -1121,6 +1127,7 @@ struct rtw_chip_info { 
	u32 rf_sipi_addr[2];

	const struct rtw_rf_sipi_addr *rf_sipi_read_addr;

	u8 fix_rf_phy_num;

	const struct rtw_ltecoex_addr *ltecoex_addr;



	const struct rtw_table *mac_tbl;

	const struct rtw_table *agc_tbl;

drivers/net/wireless/realtek/rtw88/rtw8723d.c

+7 −0
Original line number Diff line number Diff line
@@ -2289,6 +2289,12 @@ static const struct rtw_rf_sipi_addr rtw8723d_rf_sipi_addr[] = { 
			.hssi_2 = 0x82c, .lssi_read_pi = 0x8bc},

};



static const struct rtw_ltecoex_addr rtw8723d_ltecoex_addr = {

	.ctrl = REG_LTECOEX_CTRL,

	.wdata = REG_LTECOEX_WRITE_DATA,

	.rdata = REG_LTECOEX_READ_DATA,

};



static const struct rtw_rfe_def rtw8723d_rfe_defs[] = {

	[0] = { .phy_pg_tbl	= &rtw8723d_bb_pg_tbl,

		.txpwr_lmt_tbl	= &rtw8723d_txpwr_lmt_tbl,},
@@ -2393,6 +2399,7 @@ struct rtw_chip_info rtw8723d_hw_spec = { 
	.rf_sipi_addr = {0x840, 0x844},

	.rf_sipi_read_addr = rtw8723d_rf_sipi_addr,

	.fix_rf_phy_num = 2,

	.ltecoex_addr = &rtw8723d_ltecoex_addr,

	.mac_tbl = &rtw8723d_mac_tbl,

	.agc_tbl = &rtw8723d_agc_tbl,

	.bb_tbl = &rtw8723d_bb_tbl,

drivers/net/wireless/realtek/rtw88/rtw8723d.h

+3 −0
Original line number Diff line number Diff line
@@ -145,6 +145,9 @@ static inline s32 iqk_mult(s32 x, s32 y, s32 *ext) 


#define REG_BTG_SEL		0x0067

#define REG_LTECOEX_PATH_CONTROL	0x0070

#define REG_LTECOEX_CTRL	0x07c0

#define REG_LTECOEX_WRITE_DATA	0x07c4

#define REG_LTECOEX_READ_DATA	0x07c8

#define REG_PSDFN		0x0808

#define REG_BB_PWR_SAV1_11N	0x0874

#define REG_ANALOG_P4		0x088c

drivers/net/wireless/realtek/rtw88/rtw8822b.c

+7 −0
Original line number Diff line number Diff line
@@ -2057,6 +2057,12 @@ static const struct rtw_hw_reg rtw8822b_dig[] = { 
	[1] = { .addr = 0xe50, .mask = 0x7f },

};



static const struct rtw_ltecoex_addr rtw8822b_ltecoex_addr = {

	.ctrl = LTECOEX_ACCESS_CTRL,

	.wdata = LTECOEX_WRITE_DATA,

	.rdata = LTECOEX_READ_DATA,

};



static const struct rtw_page_table page_table_8822b[] = {

	{64, 64, 64, 64, 1},

	{64, 64, 64, 64, 1},
@@ -2455,6 +2461,7 @@ struct rtw_chip_info rtw8822b_hw_spec = { 
	.dig_cck = NULL,

	.rf_base_addr = {0x2800, 0x2c00},

	.rf_sipi_addr = {0xc90, 0xe90},

	.ltecoex_addr = &rtw8822b_ltecoex_addr,

	.mac_tbl = &rtw8822b_mac_tbl,

	.agc_tbl = &rtw8822b_agc_tbl,

	.bb_tbl = &rtw8822b_bb_tbl,

drivers/net/wireless/realtek/rtw88/rtw8822c.c

+7 −0
Original line number Diff line number Diff line
@@ -3907,6 +3907,12 @@ static const struct rtw_hw_reg rtw8822c_dig[] = { 
	[1] = { .addr = 0x1d70, .mask = 0x7f00 },

};



static const struct rtw_ltecoex_addr rtw8822c_ltecoex_addr = {

	.ctrl = LTECOEX_ACCESS_CTRL,

	.wdata = LTECOEX_WRITE_DATA,

	.rdata = LTECOEX_READ_DATA,

};



static const struct rtw_page_table page_table_8822c[] = {

	{64, 64, 64, 64, 1},

	{64, 64, 64, 64, 1},
@@ -4317,6 +4323,7 @@ struct rtw_chip_info rtw8822c_hw_spec = { 
	.dig_cck = NULL,

	.rf_base_addr = {0x3c00, 0x4c00},

	.rf_sipi_addr = {0x1808, 0x4108},

	.ltecoex_addr = &rtw8822c_ltecoex_addr,

	.mac_tbl = &rtw8822c_mac_tbl,

	.agc_tbl = &rtw8822c_agc_tbl,

	.bb_tbl = &rtw8822c_bb_tbl,

CRA Git | Maintained and supported by SUSTech CRA and CCSE