Commit 7ada90eb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm 

Pull more drm updates from Dave Airlie:
 "Rob pointed out I missed his pull request for msm-next, it's been in
  next for a while outside of my tree so shouldn't cause any unexpected
  issues, it has some OCMEM support in drivers/soc that is acked by
  other maintainers as it's outside my tree.

  Otherwise it's a usual fixes pull, i915, amdgpu, the main ones, with
  some tegra, omap, mgag200 and one core fix.

  Summary:

  msm-next:
   - OCMEM support for a3xx and a4xx GPUs.
   - a510 support + display support

  core:
   - mst payload deletion fix

  i915:
   - uapi alignment fix
   - fix for power usage regression due to security fixes
   - change default preemption timeout to 640ms from 100ms
   - EHL voltage level display fixes
   - TGL DGL PHY fix
   - gvt - MI_ATOMIC cmd parser fix, CFL non-priv warning
   - CI spotted deadlock fix
   - EHL port D programming fix

  amdgpu:
   - VRAM lost fixes on BACO for CI/VI
   - navi14 DC fixes
   - misc SR-IOV, gfx10 fixes
   - XGMI fixes for arcturus
   - SRIOV fixes

  amdkfd:
   - KFD on ppc64le enabled
   - page table optimisations

  radeon:
   - fix for r1xx/2xx register checker.

  tegra:
   - displayport regression fixes
   - DMA API regression fixes

  mgag200:
   - fix devices that can't scanout except at 0 addr

  omap:
   - fix dma_addr refcounting"

* tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm: (100 commits)
  drm/dp_mst: Correct the bug in drm_dp_update_payload_part1()
  drm/omap: fix dma_addr refcounting
  drm/tegra: Run hub cleanup on ->remove()
  drm/tegra: sor: Make the +5V HDMI supply optional
  drm/tegra: Silence expected errors on IOMMU attach
  drm/tegra: vic: Export module device table
  drm/tegra: sor: Implement system suspend/resume
  drm/tegra: Use proper IOVA address for cursor image
  drm/tegra: gem: Remove premature import restrictions
  drm/tegra: gem: Properly pin imported buffers
  drm/tegra: hub: Remove bogus connection mutex check
  ia64: agp: Replace empty define with do while
  agp: Add bridge parameter documentation
  agp: remove unused variable num_segments
  agp: move AGPGART_MINOR to include/linux/miscdevice.h
  agp: remove unused variable size in agp_generic_create_gatt_table
  drm/dp_mst: Fix build on systems with STACKTRACE_SUPPORT=n
  drm/radeon: fix r1xx/r2xx register checker for POT textures
  drm/amdgpu: fix GFX10 missing CSIB set(v3)
  drm/amdgpu: should stop GFX ring in hw_fini
  ...
parents 9feb1af9 9c1867d7

Documentation/devicetree/bindings/display/msm/gmu.txt

+51 −0
Original line number Original line Diff line number Diff line
@@ -31,6 +31,10 @@ Required properties: 
- iommus: phandle to the adreno iommu

- iommus: phandle to the adreno iommu

- operating-points-v2: phandle to the OPP operating points

- operating-points-v2: phandle to the OPP operating points





Optional properties:

- sram: phandle to the On Chip Memory (OCMEM) that's present on some Snapdragon

        SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml.



Example:

Example:





/ {

/ {
@@ -63,3 +67,50 @@ Example: 
		operating-points-v2 = <&gmu_opp_table>;

		operating-points-v2 = <&gmu_opp_table>;

	};

	};

};

};



a3xx example with OCMEM support:



/ {

	...



	gpu: adreno@fdb00000 {

		compatible = "qcom,adreno-330.2",

		             "qcom,adreno";

		reg = <0xfdb00000 0x10000>;

		reg-names = "kgsl_3d0_reg_memory";

		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "kgsl_3d0_irq";

		clock-names = "core",

		              "iface",

		              "mem_iface";

		clocks = <&mmcc OXILI_GFX3D_CLK>,

		         <&mmcc OXILICX_AHB_CLK>,

		         <&mmcc OXILICX_AXI_CLK>;

		sram = <&gmu_sram>;

		power-domains = <&mmcc OXILICX_GDSC>;

		operating-points-v2 = <&gpu_opp_table>;

		iommus = <&gpu_iommu 0>;

	};



	ocmem@fdd00000 {

		compatible = "qcom,msm8974-ocmem";



		reg = <0xfdd00000 0x2000>,

		      <0xfec00000 0x180000>;

		reg-names = "ctrl",

		             "mem";



		clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,

		         <&mmcc OCMEMCX_OCMEMNOC_CLK>;

		clock-names = "core",

		              "iface";



		#address-cells = <1>;

		#size-cells = <1>;



		gmu_sram: gmu-sram@0 {

			reg = <0x0 0x100000>;

			ranges = <0 0 0xfec00000 0x100000>;

		};

	};

};

Documentation/devicetree/bindings/display/msm/mdp5.txt

+2 −0
Original line number Original line Diff line number Diff line
@@ -76,6 +76,8 @@ Required properties: 
Optional properties:

Optional properties:

- clock-names: the following clocks are optional:

- clock-names: the following clocks are optional:

  * "lut"

  * "lut"

  * "tbu"

  * "tbu_rt"





Example:

Example:

Documentation/devicetree/bindings/sram/qcom,ocmem.yaml

0 → 100644
+96 −0
Original line number Original line Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/sram/qcom,ocmem.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs.



maintainers:

  - Brian Masney <masneyb@onstation.org>



description: |

  The On Chip Memory (OCMEM) is typically used by the GPU, camera/video, and

  audio components on some Snapdragon SoCs.



properties:

  compatible:

    const: qcom,msm8974-ocmem



  reg:

    items:

      - description: Control registers

      - description: OCMEM address range



  reg-names:

    items:

      - const: ctrl

      - const: mem



  clocks:

    items:

      - description: Core clock

      - description: Interface clock



  clock-names:

    items:

      - const: core

      - const: iface



  '#address-cells':

    const: 1



  '#size-cells':

    const: 1



required:

  - compatible

  - reg

  - reg-names

  - clocks

  - clock-names

  - '#address-cells'

  - '#size-cells'



patternProperties:

  "^.+-sram$":

    type: object

    description: A region of reserved memory.



    properties:

      reg:

        maxItems: 1



      ranges:

        maxItems: 1



    required:

      - reg

      - ranges



examples:

  - |

      #include <dt-bindings/clock/qcom,rpmcc.h>

      #include <dt-bindings/clock/qcom,mmcc-msm8974.h>



      ocmem: ocmem@fdd00000 {

        compatible = "qcom,msm8974-ocmem";



        reg = <0xfdd00000 0x2000>,

              <0xfec00000 0x180000>;

        reg-names = "ctrl",

                    "mem";



        clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,

                 <&mmcc OCMEMCX_OCMEMNOC_CLK>;

        clock-names = "core",

                      "iface";



        #address-cells = <1>;

        #size-cells = <1>;



        gmu-sram@0 {

                reg = <0x0 0x100000>;

                ranges = <0 0 0xfec00000 0x100000>;

        };

      };

MAINTAINERS

+0 −1
Original line number Original line Diff line number Diff line
@@ -862,7 +862,6 @@ S: Maintained 
F:	drivers/i2c/busses/i2c-amd-mp2*

F:	drivers/i2c/busses/i2c-amd-mp2*

















AMD POWERPLAY







AMD POWERPLAY











M:	Rex Zhu <rex.zhu@amd.com>














M:	Evan Quan <evan.quan@amd.com>







M:	Evan Quan <evan.quan@amd.com>











L:	amd-gfx@lists.freedesktop.org







L:	amd-gfx@lists.freedesktop.org











S:	Supported







S:	Supported

































arch/ia64/include/asm/agp.h



+2
−2






























Original line number
Original line
Diff line number
Diff line








@@ -14,8 +14,8 @@









 * in coherent mode, which lets us map the AGP memory as normal (write-back) memory







 * in coherent mode, which lets us map the AGP memory as normal (write-back) memory











 * (unlike x86, where it gets mapped "write-coalescing").







 * (unlike x86, where it gets mapped "write-coalescing").











 */







 */











#define map_page_into_agp(page)		/* nothing */







#define map_page_into_agp(page)		do { } while (0)











#define unmap_page_from_agp(page)	/* nothing */







#define unmap_page_from_agp(page)	do { } while (0)











#define flush_agp_cache()		mb()







#define flush_agp_cache()		mb()































/* GATT allocation. Returns/accepts GATT kernel virtual address. */







/* GATT allocation. Returns/accepts GATT kernel virtual address. */









































































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