Commit 9c1867d7 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2019-12-05' of... 

Merge tag 'drm-intel-next-fixes-2019-12-05' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

- Includes gvt-next-fixes-2019-12-02 pull
- Fixes for CI spotted eadlock and a race condition in GEM contexts
- Fix for EHL port D programming

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191205092412.GA8089@jlahtine-desk.ger.corp.intel.com
parents b53bd16f 01bb6303

drivers/gpu/drm/i915/display/intel_dp.c

+5 −7
Original line number Diff line number Diff line
@@ -5476,15 +5476,13 @@ static bool bxt_digital_port_connected(struct intel_encoder *encoder) 
	return I915_READ(GEN8_DE_PORT_ISR) & bit;

}



static bool icl_combo_port_connected(struct drm_i915_private *dev_priv,

				     struct intel_digital_port *intel_dig_port)

static bool intel_combo_phy_connected(struct drm_i915_private *dev_priv,

				      enum phy phy)

{

	enum port port = intel_dig_port->base.port;



	if (HAS_PCH_MCC(dev_priv) && port == PORT_C)

	if (HAS_PCH_MCC(dev_priv) && phy == PHY_C)

		return I915_READ(SDEISR) & SDE_TC_HOTPLUG_ICP(PORT_TC1);



	return I915_READ(SDEISR) & SDE_DDI_HOTPLUG_ICP(port);

	return I915_READ(SDEISR) & SDE_DDI_HOTPLUG_ICP(phy);

}



static bool icl_digital_port_connected(struct intel_encoder *encoder)
@@ -5494,7 +5492,7 @@ static bool icl_digital_port_connected(struct intel_encoder *encoder) 
	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);



	if (intel_phy_is_combo(dev_priv, phy))

		return icl_combo_port_connected(dev_priv, dig_port);

		return intel_combo_phy_connected(dev_priv, phy);

	else if (intel_phy_is_tc(dev_priv, phy))

		return intel_tc_port_connected(dig_port);

	else

drivers/gpu/drm/i915/gem/i915_gem_context.c

+2 −2
Original line number Diff line number Diff line
@@ -368,7 +368,7 @@ static struct intel_engine_cs *active_engine(struct intel_context *ce) 
	if (!ce->timeline)

		return NULL;



	rcu_read_lock();

	mutex_lock(&ce->timeline->mutex);

	list_for_each_entry_reverse(rq, &ce->timeline->requests, link) {

		if (i915_request_completed(rq))

			break;
@@ -378,7 +378,7 @@ static struct intel_engine_cs *active_engine(struct intel_context *ce) 
		if (engine)

			break;

	}

	rcu_read_unlock();

	mutex_unlock(&ce->timeline->mutex);



	return engine;

}

drivers/gpu/drm/i915/gvt/cmd_parser.c

+3 −3
Original line number Diff line number Diff line
@@ -1599,9 +1599,9 @@ static int cmd_handler_mi_op_2f(struct parser_exec_state *s) 
	if (!(cmd_val(s, 0) & (1 << 22)))

		return ret;



	/* check if QWORD */

	if (DWORD_FIELD(0, 20, 19) == 1)

		valid_len += 8;

	/* check inline data */

	if (cmd_val(s, 0) & BIT(18))

		valid_len = CMD_LEN(9);

	ret = gvt_check_valid_cmd_length(cmd_length(s),

			valid_len);

	if (ret)

drivers/gpu/drm/i915/gvt/handlers.c

+3 −2
Original line number Diff line number Diff line
@@ -460,6 +460,7 @@ static int pipeconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, 
static i915_reg_t force_nonpriv_white_list[] = {

	GEN9_CS_DEBUG_MODE1, //_MMIO(0x20ec)

	GEN9_CTX_PREEMPT_REG,//_MMIO(0x2248)

	PS_INVOCATION_COUNT,//_MMIO(0x2348)

	GEN8_CS_CHICKEN1,//_MMIO(0x2580)

	_MMIO(0x2690),

	_MMIO(0x2694),
@@ -508,7 +509,7 @@ static inline bool in_whitelist(unsigned int reg) 
static int force_nonpriv_write(struct intel_vgpu *vgpu,

	unsigned int offset, void *p_data, unsigned int bytes)

{

	u32 reg_nonpriv = *(u32 *)p_data;

	u32 reg_nonpriv = (*(u32 *)p_data) & REG_GENMASK(25, 2);

	int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);

	u32 ring_base;

	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
@@ -528,7 +529,7 @@ static int force_nonpriv_write(struct intel_vgpu *vgpu, 
			bytes);

	} else

		gvt_err("vgpu(%d) Invalid FORCE_NONPRIV write %x at offset %x\n",

			vgpu->id, reg_nonpriv, offset);

			vgpu->id, *(u32 *)p_data, offset);



	return 0;

}

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