Commit 7ab3f021 authored by James Zhu's avatar James Zhu Committed by Alex Deucher
Browse files

drm/amdgpu:Improves robustness of SOC15_WAIT_ON_RREG 



If register value is updating, reset timeout counter.
It improves robustness of SOC15_WAIT_ON_RREG.

Signed-off-by: default avatarJames Zhu <James.Zhu@amd.com>
Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9194fb22

drivers/gpu/drm/amd/amdgpu/soc15_common.h

+7 −2
Original line number Diff line number Diff line
@@ -49,14 +49,19 @@ 


#define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask, ret) \

	do {							\

		uint32_t old_ = 0;	\

		uint32_t tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \

		uint32_t loop = adev->usec_timeout;		\

		while ((tmp_ & (mask)) != (expected_value)) {	\

			udelay(2);				\

			if (old_ != tmp_) {			\

				loop = adev->usec_timeout;	\

				old_ = tmp_;				\

			} else						\

				udelay(1);				\

			tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \

			loop--;					\

			if (!loop) {				\

				DRM_ERROR("Register(%d) [%s] failed to reach value 0x%08x != 0x%08x\n", \

				DRM_WARN("Register(%d) [%s] failed to reach value 0x%08x != 0x%08x\n", \

					  inst, #reg, (unsigned)expected_value, (unsigned)(tmp_ & (mask))); \

				ret = -ETIMEDOUT;		\

				break;				\

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