firmware: xilinx: Remove eemi ops for clock set/get rate (7a1e1062) · Commits · 戴 / test

drivers/firmware/xilinx/zynqmp.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -444,13 +444,14 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
		*
		* Return: Returns status, either success or error+reason
		*/
		static int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
		int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
		{
		return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
		lower_32_bits(rate),
		upper_32_bits(rate),
		0, NULL);
		}
		EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);

		/**
		* zynqmp_pm_clock_getrate() - Get the clock rate for given id
		@@ -462,7 +463,7 @@ static int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
		*
		* Return: Returns status, either success or error+reason
		*/
		static int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
		int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
		{
		u32 ret_payload[PAYLOAD_ARG_CNT];
		int ret;
		@@ -473,6 +474,7 @@ static int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)

		return ret;
		}
		EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);

		/**
		* zynqmp_pm_clock_setparent() - Set the clock parent for given id
		@@ -742,8 +744,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
		}

		static const struct zynqmp_eemi_ops eemi_ops = {
		.clock_setrate = zynqmp_pm_clock_setrate,
		.clock_getrate = zynqmp_pm_clock_getrate,
		.clock_setparent = zynqmp_pm_clock_setparent,
		.clock_getparent = zynqmp_pm_clock_getparent,
		.ioctl = zynqmp_pm_ioctl,

+10 −2

Original line number	Diff line number	Diff line
		@@ -296,8 +296,6 @@ struct zynqmp_pm_query_data {
		struct zynqmp_eemi_ops {
		int (*fpga_load)(const u64 address, const u32 size, const u32 flags);
		int (fpga_get_status)(u32 value);
		int (*clock_setrate)(u32 clock_id, u64 rate);
		int (clock_getrate)(u32 clock_id, u64 rate);
		int (*clock_setparent)(u32 clock_id, u32 parent_id);
		int (clock_getparent)(u32 clock_id, u32 parent_id);
		int (ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 out);
		@@ -331,6 +329,8 @@ int zynqmp_pm_clock_disable(u32 clock_id);
		int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state);
		int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider);
		int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider);
		int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate);
		int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate);
		#else
		static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
		{
		@@ -369,6 +369,14 @@ static inline int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
		{
		return -ENODEV;
		}
		static inline int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
		{
		return -ENODEV;
		}
		static inline int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
		{
		return -ENODEV;
		}
		#endif

		#endif /* __FIRMWARE_ZYNQMP_H__ */