Commit 7a04c012 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mdio-iProc-SOC' 

Pramod Kumar says:

====================
Add MDIO bus multiplexer support for iProc SoCs

Broadcom iProc based SoCs use a MDIO bus multiplexer where child buses
could be internal as well external to SoCs. These buses could supports
MDIO transaction compatible to C-22/C-45.

Broadcom MDIO bus multiplexer is an integrated multiplexer where child bus
selection and mdio transaction logic lies inside multiplexer itself.
To accommodate this multiplexer in existing mux framework below changes
were required-

1. Passed MDIO parent bus via mdio_mux_init to MDIO mux framework.

This patch set includes MDIO bus multiplexer driver along with above
framework change. It includes one external bus node having Ethernet PHY
attached and two internal bus node holding PCIe PHYs.

This patch series is based on v4.7-rc1 and is available from github-
repo: https://github.com/Broadcom/arm64-linux.git


branch:mdio-mux-v5

-Changes from v4:
- disabled PCIe PHYs from dtsi and enabled in dts file.

-Changes from v3:
- Unregister and free the parent MDIO bus.
- rebased on net-next/master branch.

Reason for resend:
-Rebased on v4.7-rc1

Changes from v2:
-Addressed Rob's comments in this patch regarding typo/grammers.
-Addressed David's comments regarding local variables order.
-Removed property "mdio-integrated-mux" and used mdiobus_register()
in place of of_mdiobus_regsiter().
-removed usage of IS_ERR_OR_NULL to IS_ERR in PCIe PHY driver.

Changes from v1:
- stop using "brcm,is_c45" from bus node as suggested by Andrew. MDIO
PHY driver will logically OR MII_ADDR_C45 into the address when issues
any C45 MDIO read/write transaction.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents d46e416c 4484f730

Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt

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+59 −0
Original line number Diff line number Diff line 
Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.



This MDIO bus multiplexer defines buses that could be internal as well as

external to SoCs and could accept MDIO transaction compatible to C-22 or

C-45 Clause. When child bus is selected, one needs to select these two

properties as well to generate desired MDIO transaction on appropriate bus.



Required properties in addition to the generic multiplexer properties:



MDIO multiplexer node:

- compatible: brcm,mdio-mux-iproc.



Every non-ethernet PHY requires a compatible so that it could be probed based

on this compatible string.



Additional information regarding generic multiplexer properties can be found

at- Documentation/devicetree/bindings/net/mdio-mux.txt





for example:

		mdio_mux_iproc: mdio-mux@6602023c {

			compatible = "brcm,mdio-mux-iproc";

			reg = <0x6602023c 0x14>;

			#address-cells = <1>;

			#size-cells = <0>;



			mdio@0 {

				reg = <0x0>;

				#address-cells = <1>;

				#size-cells = <0>;



				pci_phy0: pci-phy@0 {

					compatible = "brcm,ns2-pcie-phy";

					reg = <0x0>;

					#phy-cells = <0>;

				};

			};



			mdio@7 {

				reg = <0x7>;

				#address-cells = <1>;

				#size-cells = <0>;



				pci_phy1: pci-phy@0 {

					compatible = "brcm,ns2-pcie-phy";

					reg = <0x0>;

					#phy-cells = <0>;

				};

			};

			mdio@10 {

				reg = <0x10>;

				#address-cells = <1>;

				#size-cells = <0>;



				gphy0: eth-phy@10 {

					reg = <0x10>;

				};

			};

		};

Documentation/devicetree/bindings/net/mdio-mux.txt

+2 −1
Original line number Diff line number Diff line
@@ -5,11 +5,12 @@ numbered uniquely in a device dependent manner. The nodes for an MDIO 
bus multiplexer/switch will have one child node for each child bus.



Required properties:

- mdio-parent-bus : phandle to the parent MDIO bus.

- #address-cells = <1>;

- #size-cells = <0>;



Optional properties:

- mdio-parent-bus : phandle to the parent MDIO bus.



- Other properties specific to the multiplexer/switch hardware.



Required properties for child nodes:

Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt

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+27 −0
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* Broadcom NS2 PCIe PHY binding document



Required bus properties:

- reg: MDIO Bus number for the MDIO interface

- #address-cells: must be 1

- #size-cells: must be 0



Required PHY properties:

- compatible: should be "brcm,ns2-pcie-phy"

- reg: MDIO Phy ID for the MDIO interface

- #phy-cells: must be 0



This is a child bus node of "brcm,mdio-mux-iproc" node.



Example:



mdio@0 {

	reg = <0x0>;

	#address-cells = <1>;

	#size-cells = <0>;



	pci_phy0: pci-phy@0 {

		compatible = "brcm,ns2-pcie-phy";

		reg = <0x0>;

		#phy-cells = <0>;

	};

};

arch/arm64/boot/dts/broadcom/ns2-svk.dts

+16 −0
Original line number Diff line number Diff line
@@ -52,6 +52,14 @@ 
	};

};



&pci_phy0 {

	status = "ok";

};



&pci_phy1 {

	status = "ok";

};



&pcie0 {

	status = "ok";

};
@@ -132,3 +140,11 @@ 
		#size-cells = <1>;

	};

};



&mdio_mux_iproc {

	mdio@10 {

		gphy0: eth-phy@10 {

			reg = <0x10>;

		};

	};

};

arch/arm64/boot/dts/broadcom/ns2.dtsi

+39 −0
Original line number Diff line number Diff line
@@ -263,6 +263,45 @@ 
				      IRQ_TYPE_LEVEL_HIGH)>;

		};



		mdio_mux_iproc: mdio-mux@6602023c {

			compatible = "brcm,mdio-mux-iproc";

			reg = <0x6602023c 0x14>;

			#address-cells = <1>;

			#size-cells = <0>;



			mdio@0 {

				reg = <0x0>;

				#address-cells = <1>;

				#size-cells = <0>;



				pci_phy0: pci-phy@0 {

					compatible = "brcm,ns2-pcie-phy";

					reg = <0x0>;

					#phy-cells = <0>;

					status = "disabled";

				};

			};



			mdio@7 {

				reg = <0x7>;

				#address-cells = <1>;

				#size-cells = <0>;



				pci_phy1: pci-phy@0 {

					compatible = "brcm,ns2-pcie-phy";

					reg = <0x0>;

					#phy-cells = <0>;

					status = "disabled";

				};

			};



			mdio@10 {

				reg = <0x10>;

				#address-cells = <1>;

				#size-cells = <0>;

			};

		};



		timer0: timer@66030000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x66030000 0x1000>;

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