Commit 794e94ca authored by Heiko Stuebner's avatar Heiko Stuebner
Browse files

clk: rockchip: export HDMIPHY clock on rk3228 



Export the hdmiphy clock mux via the newly added clock-id.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Tested-by: default avatarJustin Swartz <justin.swartz@risingedge.co.za>
parent d59fca07

drivers/clk/rockchip/clk-rk3228.c

+1 −1
Original line number Diff line number Diff line
@@ -256,7 +256,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { 
			RK2928_CLKGATE_CON(4), 0, GFLAGS),



	/* PD_MISC */

	MUX(0, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,

	MUX(SCLK_HDMI_PHY, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,

			RK2928_MISC_CON, 13, 1, MFLAGS),

	MUX(0, "usb480m_phy", mux_usb480m_phy_p, CLK_SET_RATE_PARENT,

			RK2928_MISC_CON, 14, 1, MFLAGS),

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