Commit 73bf2131 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'aspeed-5.9-devicetree' of... 

Merge tag 'aspeed-5.9-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.9

There is one new machine; AMD's EthanolX reference platform with an
AST2600 BMC.

Misc updates for Rainier, Tacoma, Wedge and Mihawk machines.

* tag 'aspeed-5.9-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (26 commits)
  ARM: dts: Aspeed: tacoma: Enable EHCI controller
  ARM: dts: aspeed: rainier: Enable EHCI controller
  ARM: dts: aspeed: rainier: Switch OCCs to P10
  ARM: dts: aspeed: rainier: Add FSI I2C masters
  ARM: dts: aspeed: rainier: Add CFAM SPI controllers
  ARM: dts: aspeed: rainier: Add I2C buses for NVMe use
  ARM: dts: aspeed: Initial device tree for AMD EthanolX
  ARM: dts: rainier: Describe GPIO mux on I2C3
  ARM: dts: aspeed: wedge40: Enable pwm_tacho device
  ARM: dts: aspeed: wedge40: Enable ADC device
  ARM: dts: aspeed: wedge40: Disable unused i2c controllers
  ARM: dts: aspeed: cmm: Fixup I2C tree
  ARM: dts: aspeed: tacoma: Add CFAM reset GPIO
  ARM: dts: aspeed: rainier: Add CFAM reset GPIO
  ARM: dts: aspeed: tacoma: Fix gpio-key definitions
  ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPP
  ARM: dts: aspeed: rainier: Add second cfam on the hub
  ARM: dts: aspeed: rainier: Add line-name checkstop
  ARM: dts: aspeed: tacoma: Remove checkstop gpio-key
  ARM: dts: aspeed: tacoma: Enable XDMA engine
  ...

Link: https://lore.kernel.org/r/CACPK8Xf_Np7LtcDFhywi6Uk1EgUpb0pVVa+Lr9YEwBRjbjOKCQ@mail.gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7fbdc6af 2c887638

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -1359,6 +1359,7 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb 
dtb-$(CONFIG_ARCH_ASPEED) += \

	aspeed-ast2500-evb.dtb \

	aspeed-ast2600-evb.dtb \

	aspeed-bmc-amd-ethanolx.dtb \

	aspeed-bmc-arm-centriq2400-rep.dtb \

	aspeed-bmc-arm-stardragon4800-rep2.dtb \

	aspeed-bmc-facebook-cmm.dtb \

arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts

0 → 100644
+219 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

// Copyright (c) 2020 AMD Inc.

// Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>

/dts-v1/;



#include "aspeed-g5.dtsi"

#include <dt-bindings/gpio/aspeed-gpio.h>



/ {

	model = "AMD EthanolX BMC";

	compatible = "amd,ethanolx-bmc", "aspeed,ast2500";



	memory@80000000 {

		reg = <0x80000000 0x20000000>;

	};

	aliases {

		serial0 = &uart1;

		serial4 = &uart5;

	};

	chosen {

		stdout-path = &uart5;

		bootargs = "console=ttyS4,115200 earlyprintk";

	};

	leds {

		compatible = "gpio-leds";



		fault {

			gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;

		};



		identify {

			gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;

		};

	};

	iio-hwmon {

		compatible = "iio-hwmon";

		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;

	};

};



&fmc {

	status = "okay";

	flash@0 {

		status = "okay";

		m25p,fast-read;

		#include "openbmc-flash-layout.dtsi"

	};

};





&mac0 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_rmii1_default>;

	clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,

		 <&syscon ASPEED_CLK_MAC1RCLK>;

	clock-names = "MACCLK", "RCLK";

};



&uart1 {

	//Host Console

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_txd1_default

		     &pinctrl_rxd1_default>;

};



&uart5 {

	//BMC Console

	status = "okay";

};



&adc {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_adc0_default

		     &pinctrl_adc1_default

		     &pinctrl_adc2_default

		     &pinctrl_adc3_default

		     &pinctrl_adc4_default>;

};



//APML for P0

&i2c0 {

	status = "okay";

};



//APML for P1

&i2c1 {

	status = "okay";

};



// Thermal Sensors

&i2c7 {

	status = "okay";



	lm75a@48 {

		compatible = "national,lm75a";

		reg = <0x48>;

	};



	lm75a@49 {

		compatible = "national,lm75a";

		reg = <0x49>;

	};



	lm75a@4a {

		compatible = "national,lm75a";

		reg = <0x4a>;

	};



	lm75a@4b {

		compatible = "national,lm75a";

		reg = <0x4b>;

	};



	lm75a@4c {

		compatible = "national,lm75a";

		reg = <0x4c>;

	};



	lm75a@4d {

		compatible = "national,lm75a";

		reg = <0x4d>;

	};



	lm75a@4e {

		compatible = "national,lm75a";

		reg = <0x4e>;

	};



	lm75a@4f {

		compatible = "national,lm75a";

		reg = <0x4f>;

	};

};



&kcs1 {

	status = "okay";

	kcs_addr = <0x60>;

};



&kcs2 {

	status = "okay";

	kcs_addr = <0x62>;

};



&kcs4 {

	status = "okay";

	kcs_addr = <0x97DE>;

};



&lpc_snoop {

	status = "okay";

	snoop-ports = <0x80>;

};



&lpc_ctrl {

	//Enable lpc clock

	status = "okay";

};



&pwm_tacho {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm0_default

	&pinctrl_pwm1_default

	&pinctrl_pwm2_default

	&pinctrl_pwm3_default

	&pinctrl_pwm4_default

	&pinctrl_pwm5_default

	&pinctrl_pwm6_default

	&pinctrl_pwm7_default>;



	fan@0 {

		reg = <0x00>;

		aspeed,fan-tach-ch = /bits/ 8 <0x00>;

	};



	fan@1 {

		reg = <0x01>;

		aspeed,fan-tach-ch = /bits/ 8 <0x01>;

	};



	fan@2 {

		reg = <0x02>;

		aspeed,fan-tach-ch = /bits/ 8 <0x02>;

	};



	fan@3 {

		reg = <0x03>;

		aspeed,fan-tach-ch = /bits/ 8 <0x03>;

	};



	fan@4 {

		reg = <0x04>;

		aspeed,fan-tach-ch = /bits/ 8 <0x04>;

	};



	fan@5 {

		reg = <0x05>;

		aspeed,fan-tach-ch = /bits/ 8 <0x05>;

	};



	fan@6 {

		reg = <0x06>;

		aspeed,fan-tach-ch = /bits/ 8 <0x06>;

	};



	fan@7 {

		reg = <0x07>;

		aspeed,fan-tach-ch = /bits/ 8 <0x07>;

	};

};

arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts

+1228 −3

File changed.

Preview size limit exceeded, changes collapsed.

arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts

+34 −8
Original line number Diff line number Diff line
@@ -27,6 +27,11 @@ 
	memory@40000000 {

		reg = <0x40000000 0x20000000>;

	};



	ast-adc-hwmon {

		compatible = "iio-hwmon";

		io-channels = <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>;

	};

};



&wdt1 {
@@ -115,26 +120,47 @@ 
	status = "okay";

};



&i2c9 {

&i2c11 {

	status = "okay";

};



&i2c10 {

&i2c12 {

	status = "okay";

};



&i2c11 {

&vhub {

	status = "okay";

};



&i2c12 {

&adc {

	status = "okay";

};



&i2c13 {

&pwm_tacho {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm0_default

		     &pinctrl_pwm1_default

		     &pinctrl_pwm6_default

		     &pinctrl_pwm7_default>;



	fan@0 {

		reg = <0x00>;

		aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;

	};



&vhub {

	status = "okay";

	fan@1 {

		reg = <0x01>;

		aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;

	};



	fan@6 {

		reg = <0x06>;

		aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;

	};



	fan@7 {

		reg = <0x07>;

		aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;

	};

};

arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts

+455 −11
Original line number Diff line number Diff line
@@ -12,6 +12,23 @@ 


	aliases {

		serial4 = &uart5;

		i2c16 = &i2c2mux0;

		i2c17 = &i2c2mux1;

		i2c18 = &i2c2mux2;

		i2c19 = &i2c2mux3;



		spi10 = &cfam0_spi0;

		spi11 = &cfam0_spi1;

		spi12 = &cfam0_spi2;

		spi13 = &cfam0_spi3;

		spi20 = &cfam1_spi0;

		spi21 = &cfam1_spi1;

		spi22 = &cfam1_spi2;

		spi23 = &cfam1_spi3;

		spi30 = &cfam2_spi0;

		spi31 = &cfam2_spi1;

		spi32 = &cfam2_spi2;

		spi33 = &cfam2_spi3;

	};



	chosen {
@@ -68,12 +85,51 @@ 
		};

	};



	i2c2mux: i2cmux {

		compatible = "i2c-mux-gpio";

		#address-cells = <1>;

		#size-cells = <0>;

		status = "okay";



		i2c-parent = <&i2c2>;

		mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>,

			    <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>;

		idle-state = <0>;



		i2c2mux0: i2c@0 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0>;

		};



		i2c2mux1: i2c@1 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <1>;

		};



		i2c2mux2: i2c@2 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <2>;

		};



		i2c2mux3: i2c@3 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <3>;

		};

	};

};



&ehci1 {

	status = "okay";

};



&gpio0 {

	gpio-line-names =

	/*A0-A7*/	"","","","","","","","",

	/*B0-B7*/	"","","","","","","","",

	/*B0-B7*/	"","","","","","","checkstop","",

	/*C0-C7*/	"","","","","","","","",

	/*D0-D7*/	"","","","","","","","",

	/*E0-E7*/	"","","","","","","","",
@@ -86,7 +142,7 @@ 
	/*L0-L7*/	"","","","","","","","",

	/*M0-M7*/	"","","","","","","","",

	/*N0-N7*/	"","","","","","","","",

	/*O0-O7*/	"","","","","","","","",

	/*O0-O7*/	"","","","usb-power","","","","",

	/*P0-P7*/	"","","","","","","","",

	/*Q0-Q7*/	"cfam-reset","","","","","","","",

	/*R0-R7*/	"","","","","","","","",
@@ -102,6 +158,20 @@ 
	/*AA0-AA7*/	"","","","","","","","",

	/*AB0-AB7*/	"","","","","","","","",

	/*AC0-AC7*/	"","","","","","","","";



	pin_mclr_vpp {

		gpio-hog;

		gpios = <ASPEED_GPIO(P, 7) GPIO_OPEN_DRAIN>;

		output-high;

		line-name = "mclr_vpp";

	};



	i2c3_mux_oe_n {

		gpio-hog;

		gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>;

		output-high;

		line-name = "I2C3_MUX_OE_N";

	};

};



&emmc_controller {
@@ -118,6 +188,12 @@ 
	#address-cells = <2>;

	#size-cells = <0>;



	/*

	 * CFAM Reset is supposed to be active low but pass1 hardware is wired

	 * active high.

	 */

	cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;



	cfam@0,0 {

		reg = <0 0>;

		#address-cells = <1>;
@@ -129,6 +205,84 @@ 
			reg = <0x1000 0x400>;

		};



		i2c@1800 {

			compatible = "ibm,fsi-i2c-master";

			reg = <0x1800 0x400>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		fsi2spi@1c00 {

			compatible = "ibm,fsi2spi";

			reg = <0x1c00 0x400>;

			#address-cells = <1>;

			#size-cells = <0>;



			cfam0_spi0: spi@0 {

				reg = <0x0>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam0_spi1: spi@20 {

				reg = <0x20>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam0_spi2: spi@40 {

				reg = <0x40>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam0_spi3: spi@60 {

				reg = <0x60>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};

                };



		sbefifo@2400 {

			compatible = "ibm,p9-sbefifo";

			reg = <0x2400 0x400>;
@@ -136,7 +290,7 @@ 
			#size-cells = <0>;



			fsi_occ0: occ {

				compatible = "ibm,p9-occ";

				compatible = "ibm,p10-occ";

			};

		};
@@ -163,6 +317,84 @@ 
			reg = <0x1000 0x400>;

		};



		i2c@1800 {

			compatible = "ibm,fsi-i2c-master";

			reg = <0x1800 0x400>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		fsi2spi@1c00 {

			compatible = "ibm,fsi2spi";

			reg = <0x1c00 0x400>;

			#address-cells = <1>;

			#size-cells = <0>;



			cfam1_spi0: spi@0 {

				reg = <0x0>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam1_spi1: spi@20 {

				reg = <0x20>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam1_spi2: spi@40 {

				reg = <0x40>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam1_spi3: spi@60 {

				reg = <0x60>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};

                };



		sbefifo@2400 {

			compatible = "ibm,p9-sbefifo";

			reg = <0x2400 0x400>;
@@ -170,7 +402,7 @@ 
			#size-cells = <0>;



			fsi_occ1: occ {

				compatible = "ibm,p9-occ";

				compatible = "ibm,p10-occ";

			};

		};
@@ -183,6 +415,116 @@ 
			no-scan-on-init;

		};

	};



	cfam@2,0 {

		reg = <2 0>;

		#address-cells = <1>;

		#size-cells = <1>;

		chip-id = <2>;



		scom@1000 {

			compatible = "ibm,fsi2pib";

			reg = <0x1000 0x400>;

		};



		i2c@1800 {

			compatible = "ibm,fsi-i2c-master";

			reg = <0x1800 0x400>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		fsi2spi@1c00 {

			compatible = "ibm,fsi2spi";

			reg = <0x1c00 0x400>;

			#address-cells = <1>;

			#size-cells = <0>;



			cfam2_spi0: spi@0 {

				reg = <0x0>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam2_spi1: spi@20 {

				reg = <0x20>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam2_spi2: spi@40 {

				reg = <0x40>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};



			cfam2_spi3: spi@60 {

				reg = <0x60>;

				#address-cells = <1>;

				#size-cells = <0>;



				eeprom@0 {

					at25,byte-len = <0x80000>;

					at25,addr-mode = <4>;

					at25,page-size = <256>;



					compatible = "atmel,at25";

					reg = <0>;

					spi-max-frequency = <1000000>;

				};

			};

		};



		sbefifo@2400 {

			compatible = "ibm,p9-sbefifo";

			reg = <0x2400 0x400>;

			#address-cells = <1>;

			#size-cells = <0>;



			fsi_occ2: occ {

				compatible = "ibm,p10-occ";

			};

		};



		fsi_hub2: hub@3400 {

			compatible = "fsi-master-hub";

			reg = <0x3400 0x400>;

			#address-cells = <2>;

			#size-cells = <0>;



			no-scan-on-init;

		};

	};

};



/* Legacy OCC numbering (to get rid of when userspace is fixed) */
@@ -194,6 +536,10 @@ 
	reg = <2>;

};



&fsi_occ2 {

	reg = <3>;

};



&ibt {

	status = "okay";

};
@@ -205,6 +551,21 @@ 
		compatible = "atmel,24c64";

		reg = <0x51>;

	};



	tca9554@40 {

		compatible = "ti,tca9554";

		reg = <0x40>;

		gpio-controller;

		#gpio-cells = <2>;



		smbus0 {

			gpio-hog;

			gpios = <4 GPIO_ACTIVE_HIGH>;

			output-high;

			line-name = "smbus0";

		};

	};



};



&i2c1 {
@@ -519,6 +880,96 @@ 
		compatible = "atmel,24c64";

		reg = <0x51>;

	};



	pca1: pca9552@61 {

		compatible = "nxp,pca9552";

		reg = <0x61>;

		#address-cells = <1>;

		#size-cells = <0>;

		gpio-controller;

		#gpio-cells = <2>;



		gpio@0 {

			reg = <0>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@1 {

			reg = <1>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@2 {

			reg = <2>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@3 {

			reg = <3>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@4 {

			reg = <4>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@5 {

			reg = <5>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@6 {

			reg = <6>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@7 {

			reg = <7>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@8 {

			reg = <8>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@9 {

			reg = <9>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@10 {

			reg = <10>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@11 {

			reg = <11>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@12 {

			reg = <12>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@13 {

			reg = <13>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@14 {

			reg = <14>;

			type = <PCA955X_TYPE_GPIO>;

		};



		gpio@15 {

			reg = <15>;

			type = <PCA955X_TYPE_GPIO>;

		};

	};



};



&i2c9 {
@@ -656,13 +1107,6 @@ 
		spi-max-frequency = <50000000>;

#include "openbmc-flash-layout-128.dtsi"

	};



	flash@1 {

		status = "okay";

		m25p,fast-read;

		label = "alt-bmc";

		spi-max-frequency = <50000000>;

	};

};



&spi1 {

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