Commit 739e9fff authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amdgpu: enable gfx/system/vce clockgating on Polars12.

parent 1c622002
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+1 −0
Original line number Diff line number Diff line
@@ -6452,6 +6452,7 @@ static int gfx_v8_0_set_clockgating_state(void *handle,
		break;
	case CHIP_POLARIS10:
	case CHIP_POLARIS11:
	case CHIP_POLARIS12:
		gfx_v8_0_polaris_update_gfx_clock_gating(adev, state);
		break;
	default:
+19 −1
Original line number Diff line number Diff line
@@ -1038,7 +1038,25 @@ static int vi_common_early_init(void *handle)
		adev->external_rev_id = adev->rev_id + 0x50;
		break;
	case CHIP_POLARIS12:
		adev->cg_flags = AMD_CG_SUPPORT_UVD_MGCG;
		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
			AMD_CG_SUPPORT_GFX_RLC_LS |
			AMD_CG_SUPPORT_GFX_CP_LS |
			AMD_CG_SUPPORT_GFX_CGCG |
			AMD_CG_SUPPORT_GFX_CGLS |
			AMD_CG_SUPPORT_GFX_3D_CGCG |
			AMD_CG_SUPPORT_GFX_3D_CGLS |
			AMD_CG_SUPPORT_SDMA_MGCG |
			AMD_CG_SUPPORT_SDMA_LS |
			AMD_CG_SUPPORT_BIF_MGCG |
			AMD_CG_SUPPORT_BIF_LS |
			AMD_CG_SUPPORT_HDP_MGCG |
			AMD_CG_SUPPORT_HDP_LS |
			AMD_CG_SUPPORT_ROM_MGCG |
			AMD_CG_SUPPORT_MC_MGCG |
			AMD_CG_SUPPORT_MC_LS |
			AMD_CG_SUPPORT_DRM_LS |
			AMD_CG_SUPPORT_UVD_MGCG |
			AMD_CG_SUPPORT_VCE_MGCG;
		adev->pg_flags = 0;
		adev->external_rev_id = adev->rev_id + 0x64;
		break;